[N-6] Compute-in-Memory | 2024 International Conference on Solid State Devices and Materials

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Session Details

Oral Presentation12: Advanced Circuits / Systems Interacting with Innovative Devices and Materials

[N-6]Compute-in-Memory

Wed. Sep 4, 2024 10:45 AM - 11:45 AM JST
Wed. Sep 4, 2024 1:45 AM - 2:45 AM UTC

Room N (Studio 1)(1st Floor)

Session Chair: Koh Johguchi (Shinshu Univ.), Jun Furuta (Okayama Prefectural Univ.)

10:45 AM - 11:15 AM JST(1:45 AM - 2:15 AM UTC)Invited

[N-6-01 (Invited)]Towards Efficient and Precise Analog Compute-in-Memory Circuits

〇Kentaro Yoshioka¹, Shimpei Ando¹, Satomi Miyagi¹, Yung-Chin Chen¹, Wenlun Zhang¹ (1. Keio Univ. (Japan))

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[N-6-02]A Saliency-Aware Analog Computing-In-Memory Macro with SAR-Embedded Saliency Detection Technique

〇Shimpei Ando¹, Yung-Chin Chen^1,2, Satomi Miyagi¹, Wenlun Zhang¹, Kentaro Yoshioka¹ (1. Keio Univ. (Japan), 2. National Taiwan Univ. (Taiwan))

11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)

[N-6-03]An Ultra-low Power SNN Co-processor with Reconfigurable Computing-in-Memory Cell Array based on Differential-pair SRAM and Memristive Memory

〇yaolei Guo¹, Liangyao Deng¹, Jinxu Liu¹, Chenhao Tang¹, Yue Cheng¹, Yishu Zhang^1,2,3, Yongpeng Cheng^1,2,3, Yitao Ma^1,2,3 (1. College of intergrated circuits, Zhejiang University (China), 2. ZJU-Hangzhou Global Scientific and Technological Innovation Center (China), 3. Zhejiang ICsprout Semiconductor Co., Ltd (China))

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