[A-1] CFET Technology

2:45 PM - 3:00 PM JST(5:45 AM - 6:00 AM UTC)

[A-1-05] Evaluation of SiCO as a Protective Layer for Nanosheet Integrity and Random Parasitic Channel Mitigation in Monolithic Complementary FET Fabrication

〇Yu-Fan (Andy) Peng¹, Steven Demuynck¹, Camila Toledo de Carvalho Cavalcante¹, Jishnu Ganguly¹, Cassie Sheng¹, Karen Stiers¹, Anne Vandooren¹, Maryam Hosseini¹, Dmitry Batuk¹, Thomas Chiarella¹, Anthony Peter¹, Maria Chistiakova¹, Alfonso Marquez¹, Lucas PetersenBarbosa Lima¹, Naoto Horiguchi¹, Serge Biesemans¹ (1. IMEC (Belgium))