[J-1] 3D Integration

2:30 PM - 2:45 PM JST(5:30 AM - 5:45 AM UTC)

[J-1-04] Void-Free, Low-temperature Direct Bonding of Si–Si for μLHP Integration in 3D ICs

〇Dianping Jiang¹, Marie Sano², Fumihiro Inoue², Masaaki Hashimoto¹, Hosei Nagano³, Munehiro Tada¹ (1. Keio Univ. (Japan), 2. Yokohama National Univ. (Japan), 3. Nagoya Univ. (Japan))