[J-5] In-Memory and Unconventional Computing 2

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)

[J-5-02] Comparative Scaling Analysis of Charge-Trap TFET (CT-TFETs) and Charge-Trap MOSFETs (CT-MOSFETs) for Reliable Neuromorphic Synapse Arrays

〇Jae Seung Woo^1,2, Woo Young Choi^1,2 (1. Seoul National University (Korea), 2. The Inter-university Semiconductor University Research Center (ISRC) (Korea))