[J-6] Emerging Memory Devices, and DRAM

11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)

[J-6-02] A novel solution to alleviate bit-line break and roughness in 10nm-class high-k metal gate DRAM

〇Jieun Lee¹, Taehoon Kim¹, Donghee Choi¹, Suji Kim¹, Dongseok Kim¹, Dongkyu Jang¹, Taehoon Park¹, Hyodong Ban¹ (1. Samsung Electronics (Korea))