[SO-PS-01] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

1:34 PM - 1:36 PM JST(4:34 AM - 4:36 AM UTC)

[SO-PS-01-03] Mean-Free-Path-Based Modeling of Interconnect Resistivity for Cryogenic CMOS

〇Akira Tsuchiya¹ (1. The Univ. of Shiga Prefecture (Japan))