[SO-PS-09] 09: Novel Functional / Quantum / Spintronic Devices and Materials

2:20 PM - 2:22 PM JST(5:20 AM - 5:22 AM UTC)

[SO-PS-09-04] A Proposal to Utilize V_PG-V_BG Mapping toward Optimizing Gate Voltages in Silicon Fin-Type Quantum Dot Devices

〇Yusuke Chiashi¹, Kimihiko Kato¹, Yoshihisa Iba¹, Hiroshi Oka¹, Shota Iizuka¹, Hidehiro Asai¹, Minoru Ogura¹, Takumi Inaba¹, Takahiro Mori¹ (1. AIST (Japan))