[SO-PS-09] 09: Novel Functional / Quantum / Spintronic Devices and Materials | 2025 International Conference on Solid State Devices and Materials

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Short Oral Presentation09: Novel Functional / Quantum / Spintronic Devices and Materials

[SO-PS-09]09: Novel Functional / Quantum / Spintronic Devices and Materials

Wed. Sep 17, 2025 2:14 PM - 2:28 PM JST
Wed. Sep 17, 2025 5:14 AM - 5:28 AM UTC

Room E (311, 3rd Floor)

Session Chair: Nozomi Nishizawa (Kitasato Univ.), Hidehiro Asai (AIST)

2:14 PM - 2:16 PM JST(5:14 AM - 5:16 AM UTC)

[SO-PS-09-01]Suppression of the Skyrmion Hall Angle by Introducing Ultrathin Layers into Ta/CoFeB/MgO

〇Kohei Yamashita¹, Yujian Tang¹, Tsz Chung Cheng¹, Yuichiro Kurokawa¹, Hiromi Yuasa¹ (1. Graduate School of Information Science and Electrical Engineering, Kyushu University (Japan))

2:16 PM - 2:18 PM JST(5:16 AM - 5:18 AM UTC)

[SO-PS-09-02]Large spin-splitting with complex persistent spin textures induced by interfacial effects in 2D Bi₂O₂Se/SrTiO₃ heterostructures

〇Moh. Adhib Ulil Absor¹, Arif Lukmantoro¹, Muhammad Darwis Umar¹, Edi Suprayoga², Harsojo Harsojo¹ (1. Gadjah Mada University (Indonesia), 2. National Research and Innovation Agency (Indonesia))

2:18 PM - 2:20 PM JST(5:18 AM - 5:20 AM UTC)

[SO-PS-09-03]Nonlocal Detection of Current-Induced Magnetization Dynamics in Microfabricated Pt/CoFe/n-GaAs Heterostructure

〇Varun Kumar Kushwaha¹, Mineto Ogawa², Tetsuya Uemura², Takeshi Seki¹ (1. Tohoku Univ. (Japan), 2. Hokkaido Univ. (Japan))

2:20 PM - 2:22 PM JST(5:20 AM - 5:22 AM UTC)

[SO-PS-09-04]A Proposal to Utilize V_PG-V_BG Mapping toward Optimizing Gate Voltages in Silicon Fin-Type Quantum Dot Devices

〇Yusuke Chiashi¹, Kimihiko Kato¹, Yoshihisa Iba¹, Hiroshi Oka¹, Shota Iizuka¹, Hidehiro Asai¹, Minoru Ogura¹, Takumi Inaba¹, Takahiro Mori¹ (1. AIST (Japan))

2:22 PM - 2:24 PM JST(5:22 AM - 5:24 AM UTC)

[SO-PS-09-05]Machine Learning-Based Detection of Single-Electron Regime and Virtual Gate Definition in Quantum Dots

〇Yui Muto^1,2, Michael R Zielewski^3,4, Motoya Shinozaki^5,8, Kosuke Noro^1,2,8, Tomohiro Otsuka^5,1,2,6,7,8 (1. Res. Inst. of Electrical Communication, Tohoku Univ. (Japan), 2. Department of Electronic Eng., Graduate School of Eng., Tohoku Univ. (Japan), 3. Graduate School of Info. Sci., Tohoku Univ. (Japan), 4. Unprecedented-scale Data Analytics Center, Tohoku Univ. (Japan), 5. WPI Advanced Inst. for Materials Res., Tohoku Univ. (Japan), 6. Center for Sci. and Innovation in Spintronics, Tohoku Univ. (Japan), 7. Center for Emergent Matter Sci., RIKEN (Japan), 8. Res. Center for Materials Nanoarchitechtonics, National Inst. for Material Sci. (Japan))

2:24 PM - 2:26 PM JST(5:24 AM - 5:26 AM UTC)

[SO-PS-09-06]Temperature Compensation of Analog Reservoir Computing by Integrating Monitoring Reservoir

〇Yoshihiro Furue¹, Nada Besisa¹, Satoshi Hamasuna¹, Kazuya Tsuruda¹, Takeaki Yajima¹ (1. Kyushu University (Japan))

2:26 PM - 2:28 PM JST(5:26 AM - 5:28 AM UTC)

[SO-PS-09-07 (Late News)]First Demonstration of 3D Stacked Silicon Quantum Dots with Shared Barrier Gates

〇Junoh Kim¹, Daiki Futagi¹, Tomoko Mizutani¹, Takuya Saraya¹, Hiroshi Oka², Takahiro Mori², Masaharu Kobayashi¹, Toshiro Hiramoto¹ (1. The Univ. of Tokyo (Japan), 2. AIST (Japan))

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