Session Details

[F-3]Oscillators and Interface Circuits

Wed. Sep 17, 2025 9:00 AM - 10:15 AM JST
Wed. Sep 17, 2025 12:00 AM - 1:15 AM UTC
Room F (312, 3rd Floor)
Session Chair: Akira Tsuchiya (The Univ. of Shiga Prefecture), Takeshi Yoshida (Hiroshima Univ.)

[F-3-01 (Invited)]Fractional-N Phase-Locked Loops Using Harmonic-Mixer-Based Feedback

〇Tetsuya Iizuka1, Masaru Osada1, Haoming Zhang1, Yuyang Zhu1 (1. The Univ. of Tokyo (Japan))

[F-3-02]Opto-electronically Integrated Chiplet using a CMOS-Driver-embedded substrate with a III-V Electro-absorption Modulator

〇Tadashi Minotani1,2, Tatsurou Hiraki1,2, Yohei Saito1,2, Takuma Aihara1,2, Yoshiho Maeda1,2, Toru Miura1,2, Takuro Fujii1,2, Tomonari Sato1,2, Norio Sato1,2, Shinji Matsuo2 (1. NTT Device Innovation Center (Japan), 2. NTT Device Technology Labs (Japan))

[F-3-03]A 78% Area-Reduction in Edge-Coupled Inductive Coupling Link for Flexible Chip Assembly Using Oblong Coil

〇Yuki Mitarai1, Masaya Kawano1, Hung-Chih Huang1, Tadahiro Kuroda1, Mototsugu Hamada1, Atsutake Kosuge1 (1. The University of Tokyo (Japan))

[F-3-04]A Low-Voltage 10-MHz Crystal-Less Clock Generator

〇Feng-Ming Wen1, Wen-Dong Ke1, jen-chieh liu1, Kun-Ju Tsai2, Yu Lee2 (1. National United University (Taiwan), 2. Industrial Technology Research Institute (Taiwan))