Poster Session 1

[5OlXCzC1-09] Investigation of Fully Depleted Silicon On Insulator Devices.

*Samiul Haque Touhid¹, Mubashara Maisha¹, Maisha Tasnim Adri¹, Zannatun Nahar¹, Dr. Towhid Adnan Chowdhury¹ (1. Ahsanullah University of Science and Technology (Bangladesh))

Keywords:

FD SOI MOSFET,Kink Effect Suppression,TCAD simulation,Gate Oxide Thickness,Buried Oxide Thickness,Channel Doping Concentration

[Purpose]: This paper was dedicated to modeling and optimization of the FD SOI MOSFET. It is mainly focused on the suppression of kink effect — an abnormal increase in the drain current for the high values of the drain voltage, imposing the negative effect on the device reliability and performance.

[Method]: With the scaling to the nanometer regime, the control of Short Channel Effect and body potential becomes more important. Herein, the structure dependences of FD SOI devices were studied by SILVACO TCAD simulation tool.

[Results]: After examining the numerous design parameters, three were found to be the most effective in suppressing this kink effect; viz., gate oxide thickness, channel doping concentration, and buried oxide (BOX) thickness.

[Consideration]: Gate oxide thickness, channel doping concentration and buried oxide (BOX) thickness was considered.

[Conclusion]: FD-SOI technology is an attractive option for the future because of its inherent benefits including low power, high-speed operation, and low parasitic effects. Simulation results show that by tuning these parameters such kink effect is greatly reduced and the overall performance of devices is retained. The results shed the first light not only on kink-effect phenomena in FD SOI technology, but also on the design methodology for next-generation low-power, high-reliable semiconductor devices.