[S3] Advanced FET Technologies & Optoelectronics

1:50 PM - 2:10 PM JST(4:50 AM - 5:10 AM UTC)

[S3-03] Low Temperature PMA Effect on SiO₂/GeO₂ Gate Stack
for Improvement of Electrical Characteristics and its V_FB Controllability

*Hajime Kuwazuru¹, Dong Wang², Keisuke Yamamoto^2,3 (1. IGSES, Kyushu Univ. (Japan), 2. FES, Kyushu Univ. (Japan), 3. REISI, Kumamoto Univ. (Japan))

Keywords:

Germanium,Gate stack,Low process temperature