[D-3] Si-related Devices | 2024 International Conference on Solid State Devices and Materials

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Session Details

Oral Presentation04: Power / High‐speed Devices and Materials

[D-3]Si-related Devices

Tue. Sep 3, 2024 9:00 AM - 10:00 AM JST
Tue. Sep 3, 2024 12:00 AM - 1:00 AM UTC

Room D (Medium Hall)(2nd Floor)

Session Chair: Tsuyoshi Kachi (Toshiba Device & storage), Shinsuke Harada (AIST)

9:00 AM - 9:15 AM JST(12:00 AM - 12:15 AM UTC)

[D-3-01]The Reduction of Reverse Recovery Current in RC-IGBT by Controlling Hole Injection from IGBT Region with Partially Extended N-emitter

〇Daiki Yoshikawa¹, Kazutoshi Nakamura¹, Yusuke Kawaguchi¹, Shoko Hanagata¹, Shunta Murai¹, Norio Yasuhara¹, Kenichi Matsushita¹, Takeshi Suwa¹, Keiko Kawamura¹, Seiji Inumiya¹ (1. Toshiba Electronic Devices & Storage Corporation (Japan))

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)

[D-3-02]Mitigating Self-Turn-On in Scaled CSTBT: A Focus on Poly-Si Resistivity

〇Srikanth Gollapudi¹, Ichiro Omura¹ (1. Kyushu Institute of Technology (Japan))

9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)

[D-3-03]Proposal of 1.2kV thin wafer Semi-SuperJunction IGBT (SSJ-IGBT) surpassing Full SuperJunction IGBT

〇Masahiro Tanaka¹, Naoki Abe², Akio Nakagawa³ (1. Nihon Synopsys G.K. (Japan), 2. Nihon Synopsys G.K. (Japan), 3. Nakagawa Consulting Office, LLC. (Japan))

9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)

[D-3-04]Physics-based LSTM Neural Network Surrogate Model
for SiGe HBT Intrinsic Profile Optimization

〇Gregoire Caron^1,2, Anatoli Juditsky², Nicolas Guitard¹, Didier Celi¹ (1. STMicroelectronics (France), 2. Lab. Jean Kuntzmann (France))

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