Session Details

[A-7]2D Material Integration

Thu. Sep 18, 2025 1:30 PM - 2:45 PM JST
Thu. Sep 18, 2025 4:30 AM - 5:45 AM UTC
Room A (301, 3rd Floor)
Session Chair: Keisuke Yamamoto (Kumamoto Univ.), Anabela Veloso (imec)

[A-7-01 (Invited)]TBD

TBD (1. TBD (Japan))

[A-7-02]Monolithic 3D CMOS Logic Integration of p-FinFET and 2D n-WSe2 FET with Planar Local Back-Gate

〇Chi-Chun Cheng1, Wen-Yuan Fei1, Ching-Min Hsu1, Po-Wen Chiu1 (1. The Univ. of Hsinchu (Taiwan))

[A-7-03]CMOS-Friendly Doping Strategies for p-Type WSe2 Field-Effect Transistors

〇Cheng-Chieh Hsieh1, I-Ling Li1, Cheng-Yang Hsu1, Han-Hsiang Pai1, Tsung-Che Hsieh1, Hung-Hui Yang1, Chien-Wei Chen3, Chih-Chao Yang2, Ying-Hao Chu1, Chao-Hui Yeh1 (1. National Tsing Hua Univ. (Taiwan), 2. Taiwan Semiconductor Research Inst. (Taiwan), 3. Taiwan Instrument Research Inst. (Taiwan))

[A-7-04]Fabrication of Electro-Absorption Dual Graphene Modulators on 200 mm Wafer Scale

〇Rasuole Lukose1, Ashraful Islam Raju1, Pawan Kumar Dubey1, Philipp Kulse1, Steffen Marschmayer1, Daniele Capista1, Anna Peczek1, Aleksandra Kroh1, Marco Lisker1,2, Andreas Mai1,2, Mindaugas Lukosius1 (1. IHP- Leibniz Institut für innovative Mikroelektronik (Germany), 2. Technical University of Applied Science Wildau (Germany))