[B-3] DRAM 1 | 2026 International Conference on Solid State Devices and Materials

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Session Details

Oral Presentation02: Advanced and Emerging Memories / New Applications

[B-3]DRAM 1

Wed. Sep 16, 2026 8:30 AM - 9:45 AM JST
Wed. Sep 16, 2026 11:30 PM - 12:45 AM UTC

Room B(Convention Hall 2, 2rd Floor)

Session Chair:Kazuyuki Kouno(Nuvoton Technology Corporation Japan), Takayuki Iwaki(Micron Memory Japan K.K.)

8:30 AM - 8:45 AM JST(11:30 PM - 11:45 PM UTC)

[B-3-01]N-Rich Interface-Control Nitride Metal Interlayer for Improved HZO MPB Dielectrics and Reliability in DRAM Capacitors

〇Jaewon Chung¹, Sangkuk Han¹, Wonjae Choi¹, Haesoo Jang¹, Sangmyun Lim¹, Kyungwook Park¹, Sangwoo Jeong¹, Soyoung Park¹, Kanghyeok Lee¹, Changhwan Choi¹ (1. Hanyang Univ. (Korea))

8:45 AM - 9:00 AM JST(11:45 PM - 12:00 AM UTC)

[B-3-02]Gas-phase Doping for Enhanced Dual Work Function BCAT in 10-nm node DRAM

Dongkyu Jang¹, 〇Taehoon Park¹, Inkyum Lee¹, Yongmin Jung (1. Samsung Electronics (Korea))

9:00 AM - 9:15 AM JST(12:00 AM - 12:15 AM UTC)

[B-3-03]Low Damaged Bit-line Contact for Excellent Epitaxial Regrowth for Silicon Junction in D1b-nm DRAM

〇Dongkyu Jang¹, Taewook Kim¹, Seungchul Yang¹, Minjoo Oh¹, Changmin Kim¹, Goeun Heo¹, Taehoon Park¹ (1. Samsung Electronics (Korea))

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)

[B-3-04]Fringing-Capacitance Induced Sensing-Margin Loss in Scaled BEOL 2T-DRAM and Its Mitigation

〇Rui-Tong Hu¹, Pin Su¹ (1. National Yang Ming Chiao Tung Univ. (Taiwan))

9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)

[B-3-05 (Late News)]Optimizing Bits/Cell of Weight and Input for MAC Operation with 2T0C DRAM

〇Aman Chandrakar¹, Rohit Kumar Nirala¹, Manish Gupta², Abhinav Kranti¹ (1. Indian Inst. of Tech. Indore (India), 2. BITS Pilani K K Birla Goa Campus (India))

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