Session Details
[A-3]Gate stack engineering 2
Wed. Sep 16, 2026 8:30 AM - 9:30 AM JST
Wed. Sep 16, 2026 11:30 PM - 12:30 AM UTC
Wed. Sep 16, 2026 11:30 PM - 12:30 AM UTC
Room A(Convention Hall 1, 2rd Floor)
Session Chair:Hiroyuki Ogawa(Rapidus Corporation), Shibun Tsuda(Renesas Electronics Corporation)
[A-3-01]Quantitative Evaluation of the Effect of Spike RTA and Cyclic DHF/O3 Cleaning on Ge Residue and Device Properties for GAAFET Performance Enhancement
〇Ryutaro Nishino1, Chia-Tsong Chen1, Yukinori Morita1, Naoto Kumagai1, Hiroyuki Ota1, Kazuya Uejima1, Atsushi Yagishita1, Toshifumi Irisawa1, Yoshihiro Hayashi1 (1. ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY (Japan))
[A-3-02]Effects of Nitrogen Radical Treatment on the Reliability of High-k Gate Dielectrics Contributing to Gate-All-Around Technology
〇Honoka Kido1, Mizuki Yano1, Hiroki Kondo1 (1. Kyushu Univ. (Japan))
[A-3-03]Dual WFM Patterning in mCFET RMG: Understanding Patterning Limitations and Enabling Scalable Solutions
〇Camila Toledo de Carvalho Cavalcante1, Hiroaki Arimura1, Pallavi Puttarame Gowda1, Kenneth Lai1, Efrain Altamirano Sanchez1, Dmitry Batuk1, Thomas Chiarella1, Jerome Mitard1, Violeta Georgieva1, Harinarayanan Puliyalil1, Sujith Subramanian1, Lucas Petersen Barbosa Lima1, Steven Demuynck1, Naoto Horiguchi1, Serge Biesemans1 (1. imec (Belgium))
[A-3-04]Flat-Band Voltage Control and Variability Using an Ultra-Thin Al2O3 Dipole Layer: Analysis of Dipole and Fixed Charges
〇Takefumi Kamioka1,6, Toshihide Nabatame2,6, Hiroki Matsukawa3,6, Takamasa Kawanago1,6, Yukinori Morita1,6, Kasidit Toprasertpong3,6, Yuichiro Mitani4,6, Takashi Onaya2,6, Naoki Fukata2,6, Wipakorn Jevasuwan2,6, Kazuhito Tsukagoshi2,6, Takuya Hoshii5,6, Atsushi Tamura3,6, Koji Kita3,6, Naoya Okada1,6, Kenzou Manabe1,6, Wataru Mizubayashi1,6, Hiroyuki Ota1,6, Takashi Matsukawa1,6, Shinji Migita1,6 (1. AIST (Japan), 2. NIMS (Japan), 3. The Univ. of Tokyo (Japan), 4. Tokyo City Univ. (Japan), 5. Science Tokyo (Japan), 6. LSTC (Japan))
