The 84th JSAP Autumn Meeting 2023
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Session Details

Symposium (Oral)Symposium : Renewed Challenge of Japan to Cutting-Edge Logic Technology

[21p-A201-1~8]Renewed Challenge of Japan to Cutting-Edge Logic Technology

Thu. Sep 21, 2023 1:30 PM - 4:55 PM JST
Thu. Sep 21, 2023 4:30 AM - 7:55 AM UTC
A201 (KJ Hall)
Jiro Ida(Kanazawa Inst. of Tech.), Kazuhiko Endo(Tohoku Univ.), Fukushima Takafumi(Tohoku University), Noriaki Matsunaga(Applied Materials Japan)
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シンポジウムスポンサー

シンポジウム終了後にシンポジウムスポンサーによる10分間のショートセミナーを開催いたします。ぜひご参加ください。
1:30 PM - 1:35 PM JST(4:30 AM - 4:35 AM UTC)

[21p-A201-1]Opening

〇Kazuhiko Endo1,2 (1.Tohoku University, 2.Immediate Past Chair, Silicon Technology Division)
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1:35 PM - 2:05 PM JST(4:35 AM - 5:05 AM UTC)Highlighted Presentation

[21p-A201-2]Advanced Logice Device Technology

〇Tenko Yamashita1 (1.IBM Research)
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2:05 PM - 2:35 PM JST(5:05 AM - 5:35 AM UTC)

[21p-A201-3]Main-stream Roadmap Technology and Differentiation on Logic Semiconductors:
~Strategical Positioning of Open R&D platform for Semiconductors Technology~

〇Yoshihiro Hayashi1 (1.AIST)
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2:35 PM - 3:05 PM JST(5:35 AM - 6:05 AM UTC)

[21p-A201-4]Outlook of advanced logic technology and corresponding solutions

〇Tomonari Yamamoto1 (1.Tokyo Electron Ltd.)
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3:20 PM - 3:50 PM JST(6:20 AM - 6:50 AM UTC)

[21p-A201-5]Next Interconnect Metals After Copper for Advanced Logic Devices

〇Junichi Koike1, Toshihiro Kuge1, Linghan Chen1 (1.Tohoku University)
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3:50 PM - 4:20 PM JST(6:50 AM - 7:20 AM UTC)

[21p-A201-6]The Revolution of Semiconductor Packaging in the Chiplet Era

〇Yasumitsu Orii1 (1.Rapidus Corporation)
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4:20 PM - 4:50 PM JST(7:20 AM - 7:50 AM UTC)

[21p-A201-7]Agile Design and Advanced Encryption Acceleration by Advanced CMOS process

〇Makoto Ikeda1 (1.Univ. of Tokyo)
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4:50 PM - 4:55 PM JST(7:50 AM - 7:55 AM UTC)

[21p-A201-8]Closing

〇Jiro Ida1,2 (1.Kanazawa Inst. Tech., 2.Chair, Silicon Technology Division)
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