[A-0-1]Charge Trapping in Thermal Silicon Dioxide
D. J. DiMaria(1.IBM Thomas J. Watson Research Center)
1978 Conference on Solid State Devices
Aug 29 - Aug 30, 1978The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
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1978 Conference on Solid State Devices
Aug 29 - Aug 30, 1978The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
SearchSearch Results(57)
[A-1-1]A VMOS 16K-BIT EPROM
F. B. Jenne', S. S. Nance, D. A. Draper, W. K. Wu, B. L. Bateman, T. J. Rodgers(1.American Microsystems, Inc.)
[A-1-2]N-channel Si-gate MNOS Device for High Speed EAROM
Yuji Yatsuda, Takaaki Hagiwara, Ryuji Kondo, Shinichi Minami, Yokichi Itoh(1.Central Research Laboratory, Hitachi Ltd.)
[A-1-3]Suppression of Anomalous Drain Current in Short Channel MOSFET
Masami Konaka, Hiroshi Iwai, Yoshio Nishi(1.Research Laboratory, NEC-TOSHIBA Information Systems Inc.)
[A-1-4]Novel High Density, Stacked Capacitor MOS RAM
Mitsumasa Koyanagi, Norikazu Hashimoto(1.Central Rearch Laboratory, Hitachi Ltd.)
[A-2-1]An Isolation Structure and Layout of The Buried Oxide CMOS-IC
Junji Sakurai(1.Fujitsu Limited)
[A-2-2]A 4K CMOS/SOS Static RAM with Weak Depletion Lambda Diode Cells
Tetsuya Iizuka, Takayuki Ohtani, Tai Sato, Hiroyuki Tango(1.Toshiba Research and Development Center, Toshiba Electric Co., Ltd.)
[A-2-3]A CMOS/SOS Synchronous Static RAM Fabricated with an Advanced SOS Technology
N. Sasaki, R. Togei, Y. Kobayashi, T. Iwai, M. Nakano(1.IC Division, Fujitsu Limited)
[A-2-4]A 16-bit microprocessor on SOS -PULCE-
J. IWAMURA, M. OHHASHI, M. ISOBE, M. HANADA, E. SUGINO, K. MAEGUCHI, T. SATO, H. TANGO(1.Toshiba Research and Development Center Tokyo Shibaura Electric Co., Ltd.)
[A-3-1]High Packing Density, High Speed CMOS(Hi-CMOS) Device Technology
Yoshio Sakai, Toshiaki Masuhara, Osamu Minato, Norikazu Hashimoto(1.Central Research Laboratory, Hitachi Ltd.)
[A-3-2]High Speed 1 K Bit Static RAM using DSA MOST's
K. Kobayashi, M. Saitoh, Y. Murao, K. Takahashi(1.IC Division, Central Research Labs., Nippon Electric Co., Ltd.)
[A-3-3]A 64K Dynamic MOS-RAM Using Short-Channel, Channel-Dope Technology
Toshio WADA, Masahide TAKADA, Mitsuru SAKAMOTO, Osamu KUDOH, Shunichi SUZUKI, Shigeki MATSUE(1.Nippon Electric Co., Ltd.)
[A-3-4]A High Speed I2L 1K Static RAM with 20 ns Access Time
S. Kato, K. Murakami, M. Ueda, Y. Horiba, T. Nakano(1.Mitsubishi Electric Corporation)
[B-1-1]CHARACTERIZATION OF PLASMA-DEPOSITED AMORPHOUS Si:H THIN FILMS
John C. Knights(1.Xerox Palo Alto Research Center)
[B-1-2]Determination of Localized State Density Distribution in Glow Discharge Amorphous Silicon
M. Hirose, T. Suzuki, G. H. Doehler, H. Mell(1.Max-Planck-Institut fuer Festkoerperforschung, 2.Fachbereich Physik der Philipps-Universitaet)
[B-1-3]Epitaxial Solar Cells on Refined Metallurgical-Grade Silicon
T. Warabisako, T. Saitoh, S. Matsubara, N. Nakamura, H. Itoh, T. Tokuyama(1.Central Research Laboratory, Hitachi Ltd.)
[B-1-4]Low-Cost High-Efficiency SnO2/n+-p Si Heteroface Solar Cell
H. Takakura, Y. Hamakawa(1.Faculty of Engineering Science, Osaka University)
[B-2-1]GaAs Passivation and MOS Devices
T. Ikoma, H. Yokomizo, H. Tokuda(1.Institute of Industrial Science, University of Tokyo)
[B-2-2]GaAs Integrated Logic with Normally-Off MESFETs
K. Suyama, H. Kusakawa, M. Fukuta(1.Fujitsu Laboratories Ltd.)
[B-3-1]Growth and Perfection of Silicon Crystals
Jun-ichi Chikawa, Shozo Shirai, Fumio Sato(1.NHK Broadcasting Science Research Laboratory)
[B-3-2]Contactless Measurement of Semiconductor Mobility, Conductivity and Carrier concentration
Fumio HORIGUCHI, Hideki MATSUMURA, Seijiro FURUKAWA, Hiroshi ISHIWARA(1.Department of Applied Electronics Tokyo Institute of Technology)
[B-3-3]Photoluminescence Observation of Defects in Silicon
Hisao NAKASHIMA, Yasuhiro SHIRAKI(1.Central Research Laboratory, Hitachi Ltd.)
[B-3-4]STACKING FAULTS FROM OXIDE PRECIPITATES IN CZ SILICON
Hidetoshi Takaoka, Jiro Oosaka, Naohisa Inoue(1.Musashino Electrical Communication Laboratory, NTT)
[C-1-1]Experimental Integration Technology for Josephson Tunneling Switching Devices
A. Ishida, K. Kuroda, T. Waho, H. Yamada(1.Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation)
[C-1-2]Properties of cross-shaped proximity effect weak link device
Tadayuki Kobayashi, Tsutomu Yamashita, Yutaka Onodera(1.Sendai Radio Technical College., 2.Res. Inst. of Elect. Commun. Tohoku Univ.)
[C-1-3]Fabrication of Niobium Weak Links by means of Electron Beam Lithography and Ion Implantation
K. Gamo, A. Kajiya, S. Namba(1.Faculty of Engineering Science, Osaka University)
[C-2-1]Variable Surface Acoustic Wave Delay Line Consisting of a Magnetic Thin Film on a LiNbO3 Substrate
H. Yamamoto, M. Naoe, S. Yamanaka, M. Yamaguchi, H. Kogo(1.Faculty of Engineering, Tokyo Institute of Technology, 2.Faculty of Engineering, Chiba University)
[C-2-2]Acoustoelectric Real Time Correlator
L. Rosenheck, H. Schachter, W. C. Wang(1.Department of Electrical Engineering Polytechnic Institute of New York)
[C-2-3]High Rate Deposition of ZnO Film Using Improved DC Reactive Magnetron Sputtering Technique
Tomonobu Hata, Toshiharu Minamikawa, Etsuji Noda, Toshio Hada(1.Faculty of Technology, Kanazawa University)
[C-2-4]Characterization of 1.5 μm Bubble Devices built on low Magnetization Garnet Films for alleviating Drive Fields
H. Inoue, K. Asama, K. Komenou, K. Kashiro(1.FUJITSU LABORATORIES LTD.)
[C-2-5]Stability of Small Bits Written in Amorphous GdCo Thin Films
Yuji Togami(1.NHK Broadcasting Science Research Laboratories)
[A-4-1]Mo-gate MOS Metallization System
H. Yanagawa, T. Amazawa, H. Oikawa(1.Musashino Electrical Communication Laboratory, NTT)
[A-4-2]Application of High Current Arsenic Ion Implantation to Dynamic MOS memory LSI's
Yasuo Wada, Shigeru Nishimatsu(1.Central Research Laboratory, Hitachi, Ltd.)
[A-4-3]Selective Oxide Coating of Silicon Gate (SELOCS)
Hideo Sunami, Mitsumasa Koyanagi(1.Central Research Laboratory, Hitachi Ltd.)
[A-5-1]A NEW FIELD ISOLATION TECHNOLOGY FOR HIGH DENSITY MOS LSI
Tadashi SHIBATA, Susumu KOHYAMA, Hisakazu IIZUKA(1.TOSHIBA Research and Development Center Tokyo Shibaura Electric Co., Ltd.)
[A-5-2]Deep Levels Introduced by Iron Implantation in N-Type Silicon and Its Application to Switching Devices
H. Hayashi, T. Mamine, T. Matsushita, O. Kumagai, K. Nishiyama, K. Kaneko(1.SONY Corporation Semiconductor Development Division and Research Center)
[A-5-3]Plasma Etching Monitor by Electric Probe
Yoshifumi Kawamoto, Norikazu Hashimoto(1.Central Research Laboratory, Hitachi, Ltd.)
[A-5-4]Application of IPOS technique to MOS IC
Kazuo Imai, Yutaka Yoriume(1.Electrical Communication Laboratories, Nippon Tel. & Tel. Public Corp.)
[A-6-1]Electron Beam Lithography in Practical Use for Integrated Circuits
Yoshiyuki Takeishi, Shun-ichi Sano(1.Cooperative Laboratories, VLSI Technology Research Association)
[A-6-2]Direct Electron Beam Data Writing Technology for 128K EB-ROM
E. Arai, T. Ogawa, N. Ieda, K. Kiuchi, K. Iwadate, K. Takeya(1.Musashino Electrical Communication Laboratory, NTT)
[A-6-3]An Electron Beam Exposure System (VL-RI)
M. Sumi, M. Ninomiya, F. Chiba, M. Nakasuji, S. Sano, Y. Takeishi(1.Cooperative Laboratories, VLSI Technology Research Association)
[A-6-4]MOS LSI Fabrication Process Using Direct Electron Beam Writing
Y. Sakakibara, E. Arai, H. Yoshino, T. Kobayashi, H. Akiya, K. Hirata(1.Musashino Electrical Communication Laboratory, NTT)
[A-6-5]Monte Carlo Simulation of Alignment Mark Signal for Direct Electron-Beam Writing
Naoaki Aizaki(1.Cooperative Laboratories, VLSI Technology Research Association)
[A-7-1]A NEW BIPOLAR TRANSISTOR WITH GATES PROJECTED INTO COLLECTOR REGION
Hisao KONDO, Mikio BESSHO, Yoshinori YUKIMOTO(1.Semiconductor Laboratory, Mitsubishi Electric Corporation)
[A-7-2]A 380Hx488V CCD Imager with Narrow Channel Transfer Gates
Yoshiaki Daimon-Hagiwara, Motoaki Abe(1.Sony Corporation Research Center, Semiconductor Development Division)
[B-4-1]Macroscopic Theory of Injection Lasers
Y. Suematsu M. Yamada(1.Tokyo Institute of Technology, 2.Kanazawa University)
[B-4-2]GaAs ACOUSTIC DISTRIBUTED FEEDBACK LASERS
M. YAMANISHI, T. KAWAMURA, K. TSUBOUCHI, N. MIKOSHIBA(1.Department of Electrical Engineering, University of Osaka Prefecture, 2.Research Institute of Electrical Communication, Tohoku University)
[B-5-1]The Elimination of Contact Degradation in Lead-Salt Diode Lasers
Wayne Lo(1.Physics Department, General Motors Research Laboratories)
[B-5-2]High temperature single-mode cw operation with a TJS laser using a semi-insulating GaAs substrate
H. Kumabe, T. Tanaka, H. Namizaki, S. Takamiya, W. Susaki(1.Semiconductor Laboratory, Mitsubishi Electric Corporation)
[B-5-3]Influence of Ambient Gas on the PL Intensity from InP and GaAs
H. Nagai, Y. Noguchi, Y. Mizushima(1.Musashino Electrical Communication Laboratory Nippon Telegraph and Telephone Public Corporation)
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