セッション詳細
[C-12-28]A Compact Class-F LC Oscillator with Multi-resonance Mode for Low jitter PLL Designs
○Xiong Yuang1、Xu Dingxin1、Zhang Yuncheng1、白根 篤史1、岡田 健一1 (1. 東京工業大学)
休憩時間
[C-12-29]A Multi-Phase Frequency Synthesizer with Injection-Locking Ring Oscillator
○Daxu Zhang1, Yuncheng Zhang1, Hongye Huang1, Dingxin Xu1, Atsushi Shirane1, Kenichi Okada1 (1. Tokyo Institute of Technology)
[C-12-30]A Comparator-based Gain Boosted PD Design for 32kHz Reference Oversampling PLL
○汪 文謙1、邱 俊俊1、白根 篤史1、岡田 健一1 (1. 東京工業大学)
[C-12-31]A Nonlinearity Compensation Technique for Digital-to-Time Converter in All-Digital PLLs
○劉 澤正1、黄 宏燁1、張 雲程1、白根 篤史1、岡田 健一1 (1. 東京工業大学)
[C-12-32]A Fully Synthesizable DPLL for Spread Spectrum Clock Generation
○Madany Waleed1、Hongye Huang1、Bangan Liu1、 Atsushi Shirane1、Kenichi Okada1 (1. Tokyo Institute of Technology)
[C-12-34]A study of 150-GHz CMOS active power divider with cross coupling capacitors
○Leshan Xu1, Satoshi Tanaka1, Takeshi Yoshida1, Minoru Fujishima1 (1. Hiroshima Univ.)