2024 International Conference on Solid State Devices and Materials
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Session Details

Oral Presentation01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[A-2]Innovative devices and Sensing technology

Mon. Sep 2, 2024 4:15 PM - 5:30 PM JST
Mon. Sep 2, 2024 7:15 AM - 8:30 AM UTC
Room A (407)(4th Floor)
Session Chair: Hidetoshi Oishi (Sony Semiconductor Solutions Corp.), Shoichi Kabuyanagi (KIOXIA Corp.)
4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[A-2-01]On-Wafer Polarity-Specific Response Plasma Charging Recorder
with Fin-Coupling Structure by FinFET Technology

Han-Lin Huang1, 〇Wei Chang1, Yu-Der Chih2, Jonathan Chang2, Chrong-Jung Lin1, Ya-Chin King1 (1. National Tsing Hua Univ. (Taiwan), 2. Taiwan Semiconductor Manufac. Company (Taiwan))
4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[A-2-02]1T EUV/DUV Detector in Fully Compatible 16nm FinFET Logic Process

〇Wei-Hwa Lin1, Ting-Kai Huang2, Yue-Der Chih3, Yih Wang3, Jonathan Chang3, Ya-Chin King1, Chrong Jung Lin1,2 (1. Institute of Electronics Engineering, National Tsing Hua Univ. (Taiwan), 2. College of Semiconductor Research, National Tsing Hua Univ. (Taiwan), 3. Design Technology Platform, Taiwan Semiconductor Manufac. Company (Taiwan))
4:45 PM - 5:00 PM JST(7:45 AM - 8:00 AM UTC)Late News

[A-2-03 (Late News)]Efficient Reverse Current Reduction of GeSn-Based pn Diodes by Surface Passivation of ALD-GeO2 and Al2O3 Stacked Structure

〇Yoshiki Kato1, Mitsuo Sakashita1, Masashi Kurosawa1, Osamu Nakatsuka1,2, Shigehisa Shibayama1 (1. Grad. Sch. Eng., Nagoya Univ. (Japan), 2. IMaSS., Nagoya Univ. (Japan))
5:00 PM - 5:15 PM JST(8:00 AM - 8:15 AM UTC)

[A-2-04]High-speed, Low-power, Ultra-scaled1T-pTRNG Array with 10-ns of p-bits Generation, 0.3V of the Reading-voltage, and 400-Mbits of the Throughput

〇P. H. Huang1, S. Y. Huang1, Y.-H. Lin1, K. H. Chang1, T. H. Shen1, R. Y. Lyu1, K. Y. Lee1, E Ray Hsieh Hsieh1 (1. National Central University (Taiwan))
5:15 PM - 5:30 PM JST(8:15 AM - 8:30 AM UTC)

[A-2-05]Development of Curved CMOS Image Sensors by Using SOI Layer Transfer

〇Masahide Goto1, Shigeyuki Imura1, Hiroto Sato1 (1. NHK Sci. & Tech. Res. Labs. (Japan))
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