Session Details

[C-4]Advanced integration

Tue. Sep 3, 2024 10:45 AM - 12:00 PM JST
Tue. Sep 3, 2024 1:45 AM - 3:00 AM UTC
Room C (409)(4th Floor)
Session Chair: Masayuki Kitamura (KIOXIA Corp.), Yoshiyuki Ohba (Sony Semiconductor Manufacturing Corp.)

[C-4-01 (Invited)]Backside Power Delivery Process Integration Challenges

〇Liesbeth Witters1、Peng Zhao1、Gerald Beyer1、Eric Beyne1 (1. imec (Belgium))

[C-4-02]Development of Hybrid Bonding Using Area-Selective Passivation Layer Deposition Technology on Various Substrates for Heterogeneous Integrated Structure

〇Wen-Tzu Tsai1, Mu-Ping Hsu1, Yi-Hsuan Chen1, Yuan-Chiu Huang1, Kuan-Neng Chen1 (1. National Yang Ming Chiao Tung Univ. (Taiwan))

[C-4-03]Large-Area Single-Crystal Ge Using Elevated Epitaxy Technique for Monolithic 3D Integration

〇Yu-Ming Pan1,2, Huan-Yu Chiu1, Nien-Chih Lin2, Hao-Tung Chung1, Bo-Jheng Shih1, Chiao-Yen Wang1, Chih-Chao Yang2, Po-Tsang Huang1, Chang-Hong Shen2, Po-Jung Sung2, Wen-Fa Wu2, Kuan-Neng Chen1, Chenming Hu1,3 (1. National Yang Ming Chiao Tung University (Taiwan), 2. Taiwan Semiconductor Research Institute (Taiwan), 3. University of California, Berkeley (United States of America))

[C-4-04]Optimization of Plasma Dicing Process for Die to Wafer Hybrid Bonding

〇Violeta Georgieva1, Filip Schleicher2, Ye Lin1, Samuel Suhard1, Anne Jourdain1, Edward Walsby2, Il Gyo Koo1, Frederic Lazarino1, Gerald Beyer1, Eric Beyne1 (1. IMEC (Belgium), 2. KLA-Tencor (UK))