Session Details

[N-4]Oxide Semiconductor Devices 4

Wed. Sep 17, 2025 10:45 AM - 12:00 PM JST
Wed. Sep 17, 2025 1:45 AM - 3:00 AM UTC
Room N (416+417, 4th Floor)
Session Chair: Chih-Yu Chang (TSMC), Chuan Liu (Sun Yat-sen Univ.)

[N-4-01]Balancing Work Function and Contact Resistance in IGZO TFTs via Pt-Al Alloying

〇Krittin Auewattanapun1,3, Juan Paolo S. Bermundo1, Senku Tanaka2, Hidenori Kawanishi1, Ratchatee Techapiesancharoenkij3, Yukiharu Uraoka1 (1. Nara Inst. of Science and Technology (NAIST) (Japan), 2. Kindai Univ. (Japan), 3. Kasetsart Univ. (Thailand))

[N-4-02]BEOL-Compatible Top-Gate Self-Aligned IGZO TFTs Realized by Etching-Time-Optimized ITO/IGZO Stacked Channel Architecture

Shaocong Lv1, Xiaoyu Lin1, Xianglong Li1, Zebin Zhang1, Wenbo Cui1, 〇Jiawei Zhang1 (1. School of Integrated Circuits, Shandong University (China))

[N-4-03]IGZO Schottky Barrier Thin Film Transistors with Positive Vth and Steep SS by Modulating Schottky Barrier Height

〇Tianhao Liao1,2,3, Nannan You2,3, Jiayi Wang2,3, Yang Xu2,3, Ling Li2, Shengkai Wang2,3 (1. School of Advanced Interdisciplinary Sci., Univ. of Chinese Academy of Sci. (China), 2. State Key Lab. of Fabrication Tech. for Integrated Circuits, Chinese Academy of Sci. (China), 3. High-Frequency High-Voltage Device and Integrated Circuits R&D center, Inst. of Microelectronics, Chinese Academy of Sci. (China))

[N-4-04]Employment of Flash Annealing to Enhance Electron Mobility of Atomic Layer Deposited InZnOx Channel Thin-Film Transistors

〇Li Chi Peng1, Yuma Ueno2, Kenji Inoue2, Katsuhiro Mitsuda2, Shinichi Kato2, Tsung-Te Chou3, Edward Yi Chang1, Chun-Hsiung Lin1 (1. National Yang Ming Chiao Tung Univ. (Taiwan), 2. SCREEN Semiconductor Solutions Co., Ltd. (Japan), 3. Taiwan Instrument Research Inst. (Taiwan))

[N-4-05]Room-temperature UV irradiation to improve stability of as-fabricated In-B-O thin-film transistors

Shinri Yamadera1, 〇Shinya Aikawa1 (1. Kogakuin Univ. (Japan))