[B-2] 3D NAND Flash Memory | 2026 International Conference on Solid State Devices and Materials

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Session Details

Oral Presentation02: Advanced and Emerging Memories / New Applications

[B-2]3D NAND Flash Memory

Tue. Sep 15, 2026 3:30 PM - 5:15 PM JST
Tue. Sep 15, 2026 6:30 AM - 8:15 AM UTC

Room B(Convention Hall 2, 2rd Floor)

Session Chair:Keiji Hosotani(KIOXIA Corporation), Jayavel Pachamuthu(Sandisk)

3:30 PM - 4:00 PM JST(6:30 AM - 7:00 AM UTC)

[B-2-01 (Invited)]Bandgap-Engineered Gate Stack Using BN-Based Dielectric for 3D V-NAND Flash Memory

〇Dae Hyun Kang¹, Jaejoong Jeong¹, Youngkeun Park¹, Yungjun Kim¹, Dong Hun Sin², Soo Kyeom Yong², Bio Kim², Han Mei Choi², Byung Jin Cho¹ (1. KAIST (Korea), 2. Samsung Electronics (Korea))

4:00 PM - 4:15 PM JST(7:00 AM - 7:15 AM UTC)

[B-2-02]Demonstration of Airgap-First Process for Replacement Metal Gate 3D-NAND

〇Sana Rachidi¹, Tathagata Paul¹, Jana Loyo¹, Daniel Montero Alvarez¹, Devin Verreck^1,2, Wei Zheng¹, Geert Van den bosch¹, Maarten Rosmeulen^1,2 (1. imec (Belgium), 2. KU Leuven (Belgium))

4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[B-2-03]Defect Spectroscopy Revealing Interfacial-Trap-Dominance in HfO₂-based Charge-Trap Layers for Advanced NAND Flash Application

〇Woojae Jang^1,2,3, Yusuke Higashi¹, Laurent Breuil¹, Haengha Seo¹, João Bastos¹, Geert Van den bosch¹, Maarten Rosmeulen^1,2 (1. imec (Belgium), 2. KU Leuven (Belgium), 3. Samsung Electronics (Korea))

4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[B-2-04]Intercell Engineering for Lateral Migration Improvement in QLC NAND-Type 3D Flash Memory

〇Smriti Shukla^1,2, Abhisek Dixit¹, Sainath Viswasarai², Bijay J², Akash Nigam² (1. Indian Inst. of Tech. Delhi (India), 2. Sandisk (India))

4:45 PM - 5:00 PM JST(7:45 AM - 8:00 AM UTC)

[B-2-05]A Novel Architecture with a Dual-Channel to Improve Cell Current in 3D NAND Flash

Daewoong Kang¹, 〇Hojun Lee Lee^1,2, Siwon Park^1,3, Hoyeon Ko^1,2, Jeongnam Youn¹, Youngho Jung⁴ (1. Seoul National University (Korea), 2. Chung-Ang University (Korea), 3. Soongsil Univ. (Korea), 4. Daegu University (Korea))

5:00 PM - 5:15 PM JST(8:00 AM - 8:15 AM UTC)

[B-2-06]Novel Antiferroelectric Si-Doped HfO₂ Blocking Layer for Low-Voltage (<= 15 V) Charge-Trapping Flash with a 6.90 V Memory Window

〇Kaiyi Li^1,2,3, Yuanyuan Zhao^1,3, Mingkai Bai^1,3, Xinpei Jia^1,3, Tao Hu^1,3, Yajing Ding^1,3, Ruoyao Ji^1,3, Haofeng Wang^1,3, Mengjie Zhao^1,3, Xiaoqing Sun^1,3, Junshuai Chai^1,3, Hao Xu^1,3, Xiaolei Wang^1,3 (1. State Key Lab. of Fabrication Tech. for Integrated Circuits, Inst. of Microelectronics of the Chinese Academy of Sci. (IMECAS) (China), 2. School of Advanced Interdisciplinary Sci., Uni. of Chinese Academy of Sci. (China), 3. The School of Integrated Circuits, Univ. of Chinese Academy of Sci. (China))

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