Session Details

[A-1]Advanced CMOS: Process Technology

Mon. Sep 2, 2024 2:30 PM - 4:00 PM JST
Mon. Sep 2, 2024 5:30 AM - 7:00 AM UTC
Room A (407)(4th Floor)
Session Chair: Genji Nakamura (Tokyo Electron Ltd.), Takashi Matsukawa (AIST)

[A-1-01 (Invited)]3D stacked devices and MOL innovations for post-Nanosheet CMOS scaling

〇Steven Demuynck1、Victor Vega Gonzalez1、Camila Toledo1、Karen Stiers1、Cassie Sheng1、Andy Peng1、Dmitry Batuk1、Maryam Hosseini1、Anne Vandooren1、Lucas Lima1、Naoto Horiguchi1、Serge Biesemans1 (1. imec (Belgium))

[A-1-02]Source-Drain Damage of Monolithic Complementary Field Effect Transistors: A Comprehensive Study of Failure Modes and Mitigation Strategies

〇Camila Toledo de Carvalho Cavalcante1, Steven Demuynck1, Emmanuel Dupuy1, Thomas Chiarella1, BT Chan1, Pallavi Puttarame Gowda1, Il Gyo Koo1, Hans Mertens1, Anne Vandooren1, Farid Sebaai1, Jef Geypen1, Sujith Subramanian1, Lucas Petersen Barbosa Lima1, Serge Biesemans1, Naoto Horiguchi1 (1. imec, Leuven, Belgium (Belgium))

[A-1-03]Demonstration of Poly Gate Cut Process at Tight Gate Pitch of 50nm and High Gates Aspect Ratio for Advanced Device Architectures

〇Xiuju Zhou1, Zheng Tao 1, Hans Mertens1, Emmanuel Dupuy1, Anabela Veloso1, Boon Teik Chan1, Sujith Subramanian1, Naoto Horiguchi1, Serge Biesemans1, Elisabeth Camerotto2, Haseeb Kazi2, Ziad El Otell2 (1. IMEC (Belgium), 2. Lam Res. Corp. (United States of America))

[A-1-04]Low-Thermal Budget Activation for 3D Integration by Green Nanosecond Laser

〇Hongxu Liao1, Yandong Ge1, Haixia Li1, Lanyi Xie2, Qing Wang1, Ming Li1,3, Ru Huang1,3 (1. School of Integrated Circuits, Peking University (China), 2. Department of Energy and Resources Engineering, Peking University (China), 3. Beijing Advanced Innovation Center for Integrated Circuits (China))

[A-1-05]Transferring Compressive or Tensile Stress from Stressors to Si Layers: A Novel Approach

〇Pablo Acosta Alba1, Mayara Auricchio1, Patrice Gergaud1, Jean-Michel Hartmann1, Shay Reboh1 (1. Univ. Grenoble ALpes, CEA-LETI (France))