検索条件
フリーワード：
開催年：
2023〜2023
すべてのイベントから検索します。検索結果は最大１万件まで表示されます。
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検索条件
| フリーワード： | |
|---|---|
| 開催年： | 2023〜2023 |
すべてのイベントから検索します。検索結果は最大１万件まで表示されます。
〜
検索結果(107)
[Session_1-01]【Invited】Multi-physics simulations for nanoscale CMOS reliability
*Xiaoyan Liu1, Mengqi Fan1, Jinghan Xu1, Fei Liu1(1. Peking University)
[Session_1-02]Modeling the Thermal Characteristics of Stacked 2T0C Memory Array Based on InGaZnO4 Thin-film Transistors
*Song He1, Haoxin Li1, Guangwei Xu1, Xinyi Tang1, Yuanbiao Li1, Jaewoo Kim2, Tingting Gu2, Xingkun Xue2, Zelun Li2, Handong Xu2, Haiyang Dong2, Kai Zhou1, Xianqin Hu1,2, Shibing Long1(1. Univ. of Sci. and Tech. of China, 2. Changxin Memory Tech. Inc. )
[Session_1-03]Full Band Monte Carlo Simulation of Thermal Transport Across Lateral Interface Between 2D Materials
*Junbum Park1, Lorenzo Paulatto2, Marco Pala1, Jerome Saint-Martin1,2(1. Paris-Saclay Univ., 2. Sorbonne Univ.)
[Session_1-04]Limitations on Pitch Design due to Thermal Crosstalk in Pr1-xCaxMnO3 RRAM Crossbar Arrays
*Ujwal Uttarwar1, Kunal Kaushik1, Jayatika Sakhuja1, Vivek Saraswat1, Sandip Lashkare1, Udayan Ganguly2,1(1. Indian Inst. Of Tech. Bombay, 2. IITB Centre for Semiconductor Tech. (SEMIX))
[Session_1-05]Full Chip Stress Model for Flash BEOL Crack Failure Risk Analysis
*Kyungmi Yeom1, Geunsang Yoo1, Anthony Payet2, Alexander Schmidt1, Hyoshin Ahn1, Inkook Jang1, Yutaka Nishizawa2, Masaru Uchiyama2, Yasuyuki Kayama2, Satoru Yamada2, Dae Sin Kim1(1. CSE Team, Innovation Center, Samsung Electronics, 2. DSRJ)
[Session_3-01]Materials to System Co-optimization (MSCOTM) for SRAM and its application towards Gate-All-Around Technology
*Pratik B Vyas1, Ashish Pal1, Gregory Costrini1, Plamen Asenov2, Sarra Mhedhbi1, Charisse Zhao1, Victor Moroz2, Benjamin Colombeau1, Bala Haran1, El Mehdi Bazizi1, Buvna Ayyagari-Sangamalli1(1. Applied Materials Inc., 2. Synopsys Inc.)
[Session_3-02]Next Generation Gate-all-around Device Design for Continued Scaling Beyond 2nm Logic Node
*Pratik B Vyas1, Charisse Zhao1, Sefa Dag1, Ashish Pal1, El Mehdi Bazizi1, Buvna Ayyagari-Sangamalli1(1. Applied Materials Inc)
[Session_3-03]DC/AC/RF Characteristics of Multi-Channel GAA NS FETs with ML and BL MoS2
*Yueh-Ju Chan1, Sekhar Kola1, Yiming Li1(1. National Yang Ming Chiao Tung Univ.)
[Session_3-04]SOI pMOS Drain Leakage Understanding Based on TCAD and Measurements
*Daphnée Bosch1, Pierre Lheritier1, Francois Guyader2, Sylvain Joblot2, Fabienne Ponthenier1, Joris Lacord1(1. CEA-Leti, Univ., 2. STMicroelectronics)
[Session_3-05]Doped Channel SOI pMOS TCAD Description Including Floating Body Effects
*Joris Lacord1, Ayoub Boutayeb1,2,3, Daphnée Bosch1, Obaid Adami1, Pierre Lhéritier1, François Guyader2, Sylvain Joblot2, Fabienne Ponthenier1(1. CEA-Leti, Univ. Grenoble Alpes, 2. STMicroelectronics, 3. Univ. Grenoble Alpes, Univ. Savoie Mont Blanc, CNRS, Grenoble INP, IMEP-LAHC)
[Session_2-01]Mobility Limitations in TMD Monolayers: The Influence of Impurities and Remote Phonons
*Shoaib Mansoori1, Sanjay Gopalan1, Massimo V. Fischetti1(1. Univ. of Texas at Dallas)
[Session_2-02]Tight-binding simulation of graphene nanoantenna based on Boltzmann equation and finite difference time-domain method
*Shota Ogisawa1, Satofumi Souma1(1. Kobe University)
[Session_2-03]Electronic Transparency Limit of hBN Separation Layer for Quantum-Hybridization Negative Differential Resistance in Vertical Graphene/hBN/Graphene Heterojunctions
*Tae Hyung Kim1, Juho Lee1, Yong-Hoon Kim1(1. Korea Advanced Institute of Science and Technology)
[Session_2-04]Quantum Transport Study of Contact Resistance of Top- and Edge-Contacted Two-Dimensional Materials
*Emeric Deylgat1,2,3, Edward Chen4, Bart Sorée2,3,5, William Vandenberghe1(1. Univ. of Texas at Dallas, 2. Imec, 3. KU Leuven, 4. TSMC, 5. Univ. Antwerpen)
[Session_2-05]Multi-Scale Modeling Transistors Based on the 2D Semiconductor Bi2O2Se and its Native Oxide Bi2SeO5
*Mohammad Rasool Davoudi1, Pedram Khakbaz1, Dominic Waldhoer1, Theresia Knobloch1, Yichi Zhang2, Hailin Peng2, Tibor Grasser1(1. TU Wien Univ., 2. Peking Univ.)
[Session_4-01]Physics-Informed Compact Model for SF6/O2 Plasma Etching
*Lado Filipovic1, Josip Bobinac2, Julius Piso2, Tobias Reiter1(1. CDL for Process Modeling of Semiconductor Based Devices and Sensors at the Institute for Microelectronics, TU Wien, 2. Institute for Microelectronics, TU Wien)
[Session_4-02]A Boltzmann Transport Equation Model for Substrate Damage During Focused Helium Ion Beam Fabrication of Nanostructures
*Qi Li1, Ye Chen1, Yan Xing1(1. Southeast University)
[Session_4-03]Influence of Surface Halogenation on Silane Adsorption onto Silicon Surfaces for Poly-Si Epitaxy: A Density Functional Theory Study with Neural Network Potential
*Hyunhak Jeong1, Byungjo Kim1, Youjung Kim2, Hanmei Choi2, Suyoung Yoo1, Sang Ki Nam1(1. Mechatronics Res., Samsung Electronics, 2. Semiconductor R&D Center, Samsung Electronics)
[Session_4-04]Modeling Oxide Regrowth During Selective Etching in Vertical 3D NAND Structures
*Tobias Reiter1, Alexander Toifl2, Andreas Hössinger2, Lado Filipovic1(1. TU Wien, Inst. for Microelectronics, 2. Silvaco Europe Ltd.)
[Session_4-05]An effective grain growth model using a combination of Voronoi tessellation and Monte-Carlo methods
*Chihak Ahn1, Seonghoon Jin1, Gijae Kang2, Joohyun Jeon2, Hyoshin Ahn2, Inkook Jang2, Woosung Choi1, Dae Sin Kim2(1. Samsung Semiconductor Inc., 2. Samsung Electronics)
[PL-01]【Plenary】Superconducting route to quantum computing
*Eisuke Abe1(1. RIKEN)
[PL-02]【Plenary】Simulation Challenges of SiC MOSFET Switching Performance and Reliability
*James Victory1, Jaume Roig Guitart2, Rishi Krishna3, Kan Jia4, Dan Zurek5, Petr Betak5, Canzhong He1, Jiri Lehocky5(1. onsemi, USA, 2. onsemi, Belgium, 3. onsemi, Sweden, 4. onsemi, China, 5. onsemi, Czech Republic)
[PL-03]【Plenary】Modelling and Simulations of Ferroelectric Materials and Ferroelectric-Based Nanoelectronic Devices
*David Esseni1, F. Driussi1, D. Lizzit1, M. Massarotto1, M. Segatto1(1. DPIA, University of Udine)
[Session_5-01]【Invited】Modeling Degradation and Breakdown in SiO2 and High-k Gate Dielectrics
*Andrea Padovani1, Paolo La Torraca1, Luca Larcher2, Jack Strand3, Alexander Shluger3(1. University of Modena and Reggio Emilia, 2. Applied Materials, 3. University of College London)
[Session_5-02]Understanding the impact of polysilicon percolative conduction on 3D NAND variability
*Salvatore Maria Amoroso1, Gerardo Malavena2, Andrew Robert Brown1, Plamen Asenov1, Xi-Wei Lin1, Victor Moroz1, Mattia Giulianini2, David Gianluigi Refaldi2, Christian Monzio Compagnoni2, Alessandro Sottocornola Spinelli2(1. Synopsys Inc., 2. Politecnico di Milano)
[Session_5-03]Self-Heating Influence on Hot Carrier Degradation Reliability of GAA FET by 3D KMC Method
*Songhan Zhao1, Pan Zhao1, Yandong He1, Gang Du1(1. School of Integrated Circuits, Peking University)
[Session_5-04]Theoretical Limit of TiSi2 Contact Resistance
*Min Yong Jeong1, Mohammad Ali Pourghaderi1, Kantawong Vuttivorakulchai1, Seunghyun Song1, Yoon-Suk Kim1, Márton Vörös2, Seonghoon Jin2, Byounghak Lee2, Woosung Choi2, Uihui Kwon1, Dae Sin Kim1(1. Samsung Electronics Co., Ltd., 2. Device Laboratory Samsung Semiconductor Inc.)
[Session_5-05]Effect of Metal Coupling on Schottky Barrier Height Extraction
Sheng-Kai Su1, Edward Chen1, Alfonso Sanchez-Soares2, Thomas Kelly2, Giorgos Fagas2,4, *James C. Greer2,5, Gregory Pitner 3, H.-S. Philip Wong1,6, Iuliana P. Radu1(1. TSMC, Hsinchu, Taiwan, 2. EOLAS Designs Ltd, 3. TSMC, San Jose, USA, 4. Tyndall Nat'l Inst., Univ. College Cork, 5. Electrical and Electronic Engineering Department, Univ. of Nottingham Ningbo China, 6. Department of Electrical Engineering, Stanford Univ.)
[Session_5-06]Random Telegraph Noise Simulation and the Impact on Noise Sensitive Design
*Menglin Lu1, Chienming Hung1, Minglong Fan1, Yishuo kasa Huang1, Chaochieh Matt Li1, Minshueh Yuan1, Chihhsien Chang1, Tsungshih Chiang1, Kewei Su1, Chungkai Lin1(1. TSMC)
[Session_7-01]【Invited】Quantum Mechanical Modeling Techniques for High-Performance Low-k Amorphous Material Engineering: a Showcase for aBN
Blanka Magyari-Köpe1, Hans Hsu2, *Jeff Wu2(1. Taiwan Semiconductor Manufacturing Company Technology Inc., San Jose, CA, USA, 2. Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW)
[Session_7-02]Quantum Modeling of Semiconductor Leakage Currents Induced by Defects
Antoine Jay1, Clément Mesnard1, Isobel Nicholson2, Rémi Helleboid2, Gabriel Mugny2, *Denis Rideau2, Vincent Goiffon3, Layla Martin-Samo5, Nicolas Richard4, Anne Hémeryck1(1. Lab. d'analyse et d'architecture des systèmes, CNRS, Univ. de Toulouse, 2. ST Microelectronics, 3. ISAE-SUPAERO, 4. CEA/DIF, Bruyères-le-Châtel, 5. CNR-IOM, Democritos National Simulation Center, Istituto Officina dei Materiali, c/o SISSA)
[Session_7-03]Defects in Strontium Titanate: A First Principles Study
*Mina Bahrami1, Dominic Waldhoer1, Pedram Khakbaz1, Theresia Knobloch1, Tibor Grasser1(1. TU Wien Univ.)
[Session_7-04]Intrinsic Electron Trapping in Amorphous Silicon Nitride (a-Si3N4:H)
*Christoph Wilhelmer1,2, Dominic Waldhoer2, Diego Milardovich2, Michael Waltl1, Tibor Grasser2(1. Christian Doppler Lab. for Single-Defect Spectroscopy in Semiconductor Devices at the Inst. for Microelectronics, 2. Inst. for Microelectronics, Technische Univ. Wien)
[Session_7-05]Monte-Carlo Based Simulation Method for Ferroelectric Memory Devices Including Polarization Switching and Trap Behaviors
*Mengqi Fan1, Xujin Song1, Fei Liu1, Xiaoyan Liu1(1. Peking Univ.)
[Session_6-01]Compact Metal-Ferroelectric-Insulator-Semiconductor (MFIS) Approaches Versus TCAD For The Modeling Of Ferroelectric Transistors (FeFETs): Percolation, Steep-Subthreshold and Depolarization
*Mischa Thesberg1, Franz Schanovsky1, Zlatan Stanojevic1, Oskar Baumgartner1, Markus Karner1(1. Global TCAD Solutions GmbH)
[Session_6-02]A Compact Model of FTJ Covering the Trapping/De-trapping Charateristics
*Ning Feng1, Ning Ji1, Fangxing Zhang1, Yu Li1, Puyang Cai2, Hao Li1, Lining Zhang1, Runsheng Wang2, Ru Huang2(1. School of ECE, Peking University, 2. School of Integrated Circuits, Peking University)
[Session_6-03]FDSOI MOSFET Subthreshold Slope Model Accuracy Improvement Introducing Low-Field Quantum Mechanical Correction
*Thomas Bédécarrats1, François Triozon1, Sébastien Martinie1, Mikaël Cassé1, Olivier Rozeau1(1. CEA-LETI, Univ. Grenoble Alpes)
[Session_6-04]Body Resistance Model For Partially Depleted SOI Device: Charge-Based Approach, Extraction and Verilog-A Implementation.
Sébastien Martinie1, *Adrien Vaysset1, Yannick Mourrier2, Patrick Scheer2, Olivier Rozeau1(1. CEA-LETI, Univ. Grenoble Alpes, 2. STMicroelectronics)
[Session_6-05]A Compact Model of FDSOI based 1-T Pixel Sensor for Design of In-sensor Computing
*Guihai Yu1,2, Zheng Zhou1,2, RuiQi Chen1,2, JiaQi Li1,2, Yi Xiao1,2, Peng Huang1,2, JinFeng Kang1,2, XiaoYan Liu1,2(1. Peking University, 2. Beijing Advanced Innovation Center for Integrated Circuits)
[Session_8-01]FlowSim: An Invertible Generative Network for Efficient Statistical Analysis under Process Variations
Chanwoo Park1, *Hong Chul Nam1,2, Jihun Park1, Jongwook Jeon1,3(1. Alsemy Inc., 2. ETH Zurich, 3. Sungkyunkwan Univ.)
[Session_8-02]Device Image-IV Mapping using Variational Autoencoder for Inverse Design and Forward Prediction
Thomas Lu1, Albert Lu1, *Hiu Yung Wong1(1. San Jose State University)
[Session_8-03]A Novel Machine-Learning Based Mode Space Method for Efficient Device Simulations
*Yeongjun Lim1, Mincheol Shin1(1. KAIST)
[Session_8-04]Fully Convolutional Generative Machine Learning Method for Accelerating Non-Equilibrium Green’s Function Simulations
*Preslav Aleksandrov Aleksandrov1, Ali Rezaei1, Nikolas Xeni1, Tapas Dutta1, Asen Asenov1, Vihar Georgiev1(1. Univ. of Glasgow)
[Session_8-05]Statistical Modeling of Metal-Oxide RRAM SET/RESET Behavior Using Deep Neural Networks
*Aarav Wattal1, Akash Levy1, Zainab Faryal Khan1(1. Stanford Univ.)
[P-01]Ballistic Heat Transport in MoS2 Monolayers
*Rutger Duflou1,2, Michel Houssa1,2, Aryan Afzalian1(1. imec, 2. KU Leuven)
[P-02]Change of electrical characteristics of a p-type MOSFET via hydrogen effect on boron redistribution
*Youngrok Kim1, Chihak Ahn2, Alexander Schmidt1, Joohyun Jeon1, Sae-Jin Kim1, Hakseon Kim1, Hyunjae Kim1, Hyeyoung Kwon1, Yero Lee1, Sung Jin Kim1, Dongjin Lee1, Jaeduk Lee1, Dae Sin Kim1(1. Samsung Electronics Co., Ltd., 2. Samsung Semiconductor Inc.)
[P-03]Molecular Dynamics Study of Al Implantation in 4H-SiC
Sabine Leroch1, *Robert Stella1, Andreas Hössinger2, Lado Filipovic1(1. University of Technology Vienna, 2. Silvaco Ldt Europe)
[P-04]First-Principles Study of Charged Point Defects in 4H-SiC: Accurate Formation Energies, Trap Levels, and Beyond
*Haruhide Miyagi1, Ulrik G. Vej-Hansen2, Brad A. Wells2, Jan-Niclas Luy2, Christoph Zechner3(1. Nihon Synopsys G.K., 2. Synopsys Denmark, 3. Synopsys GmbH)
[P-05]Tunneling Leakage Current Dependent RDD Model Framework for Gate Oxide TDDB
*Tarun Samadder1, Souvik Mahapatra1(1. IIT Bombay)
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