Session Details
[Tu-P]RF, High-Temp., and Rad-Hard Devices and ICs
Tue. Sep 29, 2026 4:00 PM - 6:00 PM JST
Tue. Sep 29, 2026 7:00 AM - 9:00 AM UTC
Tue. Sep 29, 2026 7:00 AM - 9:00 AM UTC
Poster-C(4th Floor, G403+G404)
[Tu-P-70]Device-to-Circuit Stability of SiC CMOS Current Mirrors Under 15 MeV Proton Irradiation and 180 °C Operation
Tae Seong Kwon1,2, Young Jo Kim1, Hyoung Woo Kim1, Young Jun Yoon3, Sung Yun Woo2, *Jae Hwa Seo1 (1. Korea Electrotechnology Res. Inst. (Korea), 2. Kyungpook National Univ. (Korea), 3. Gyeongkuk National Univ. (Korea))
[Tu-P-71]Radiation Hardness of implanted 4H-SiC LGADs after 23 MeV protons
Francesco Moscatelli1,2, Arianna Morozzi2, Valentina Sola3,8, Daniele Passeri4,2, Peter Svihra5,6, Radek Novotny5, Vojtech Kracmar5, Jiri Kroll6, Alexander Dierlamm7, Brendan Regnery7, Robert White8, Marco Ferrero8, Sebastian Onder9, Thomas Bergauer9, *Adam Klimsza10 (1. CNR-Inst. Officina dei Materiali (IOM) (Italy), 2. INFN of Perugia (Italy), 3. Department of Physics, Univ. of Torino (Italy), 4. Department of Eng., Univ. of Perugia (Italy), 5. Department of Physics, FNSPE CTU in Prague (Czech Republic), 6. Department of Detector Development and Data Processing, FZU CAS (Czech Republic), 7. Karlsruhe Inst. of Technology (Germany), 8. INFN of Torino (Italy), 9. Marietta Blau Inst. for Particle Physics (Austria), 10. Onsemi (Czech Republic))
[Tu-P-72]Design of 650 V Multi-Channel SiC LMOSFET with Enhanced Radiation Hardness
*Subin Choi1, Hyerin Ju1, Sihyun Kwon1, Jeemin Hyun1, Ogyun Seok1 (1. Pusan National Univ. (Korea))
[Tu-P-73]4H-SiC Active Pixel Sensors with a 4-pixel Sharing Circuit Structure
*Sho Suzuki1, Tatsuya Meguro1, Akinori Takeyama2, Takeshi Ohshima2, Kazutoshi Kojima3, Yasunori Tanaka3, Shin-Ichiro Kuroki1 (1. RISE, Hiroshima Univ. (Japan), 2. QST (Japan), 3. AIST (Japan))
[Tu-P-74]4H-SiC Neutron Sensors Based on Active Pixel Sensing Structurefor Boron Neutron Capture Therapy
*Vu Thi Ha1, Tatsuya Meguro1, Kazutoshi Kojima2, Hiroki Tanaka3, Shin-Ichiro Kuroki1 (1. RISE, Hiroshima Univ. (Japan), 2. AIST (Japan), 3. KURNS, Kyoto Univ. (Japan))
[Tu-P-75]Logic Circuit Designs, Processes, and Characterization toward 6-inch 4H-SiC CMOS Platform
*Chihon Saito1, Shunto Higashi1, Kota Shimizu1, Kosuke Muraoka1, Tatsuya Meguro1, Tomonori Maeda1,2, Hiroshi Sezaki1,2, Akinori Takeyama3, Takeshi Ohshima3, Kazutoshi Kojima4, Yasunori Tanaka4, Shin-Ichiro Kuroki1 (1. RISE, Hiroshima Univ. (Japan), 2. Phenitec Semiconductor Corp. (Japan), 3. QST (Japan), 4. AIST (Japan))
[Tu-P-76]Memory Characteristics of 4H-SiC Floating-Gate MOS Capacitors
*Ryosuke Namba1, Kosuke Muraoka1, Takeyama Akinori2, Takeshi Ohshima3,2, Kazutoshi Kojima3, Yasunori Tanaka3, Shin-Ichiro Kuroki1 (1. Hiroshima Univ. (Japan), 2. QST (Japan), 3. AIST (Japan))
[Tu-P-77]Impact of Single-Stage Amplifier Load Resistance on Regenerative Characteristics of Monolithically Integrated SiC JFET NOT Gates
*Haizhao Zhi1, Sirui Feng1, Ling Li1, Rongxin Du1, Xinpeng Lin1, Jinghan Xu1, Xinyue Dai1, Xiaoping Wang1, Yuxi Wan1 (1. Shenzhen Pinghu Laboratory (China))