Session Details

[11a-E201-1~8]13.3 Insulator technology

Fri. Sep 11, 2026 9:00 AM - 11:00 AM JST
Fri. Sep 11, 2026 12:00 AM - 2:00 AM UTC
E201 (First Year Education Bld. E Block)

[11a-E201-1]Low temperature PMA effect on SiO2/GeO2/Ge gate stack

〇Hajime Kuwazuru1, Dong Wang2, Keisuke Yamamoto2,3 (1.IGSES, Kyushu Univ., 2.FES, Kyushu Univ., 3.REISI, Kumamoto Univ.)

[11a-E201-2]Two-step deposition and characterization of ultrathin GeO2/Ge interfaces

〇Hiroki Inoue1, Yoshitaka Iwasaki1, Tomo Ueno1, Mitaro Namiki1 (1.Tokyo univ. of Agri & Tech)

[11a-E201-3]In-situ atomic layer deposition of Al2O3/GeO2/Ge structure

〇Yoshiki Kato1, Mitsuo Sakashita1, Masashi Kurosawa1, Osamu Nakatsuka1,2, Shigehisa Shibayama1 (1.Grad.Sch.Eng.,Nagoya Univ., 2.IMaSS,Nagoya Univ.)

[11a-E201-4]ALD YOx/Ge MOS Structures toward Ge GAAFETs

〇Keisei Kawana1,2, Kouhei Wakimoto1,2, Wen Chang1, Chia Tsong Chen1, Toshiyuki Tsutsumi1,2, Tatsuro Maeda1 (1.AIST, 2.Meiji Univ.)

[11a-E201-5]Band alignment anomalies in oxide-semiconductor MOS interface observed by flatband voltage shifts: A comparative study of Al2O3/β-Ga2O3 and SiO2/β-Ga2O3

〇Atsushi Tamura1, Koji Kita1 (1.GSFS, The Univ. of Tokyo)

[11a-E201-6]Vfb control of HfZrO2 capacitors using new LaTiO and AlTiO dipole layers

〇Toshihide Nabatame1,2, Tomomi Sawada1,2, Hiromi Miura1,2, Manami Miyamoto1,2, Takashi Onaya1,2, Kazuhito Tsukagoshi1,2, Naoki Fukata1,2, Wipakorn Jevasuwan1,2, Shinji Migita2,3 (1.NIMS, 2.LSTC, 3.AIST)

[11a-E201-7]Evaluation of TiO2-mixed dipole layers for multi-Vth control

〇Takefumi Kamioka1,6, Toshihide Nabatame2,6, Hiroyuki Matsukawa3,6, Takamasa Kawanago1,6, Yukinori Morita1,6, Kasidit Toprasertpong3,6, Yuichiro Mitani4,6, Takashi Onaya2,6, Naoki Fukata2,6, Wipakorn Jevasuwan2,6, Kazuhito Tsukagoshi2,6, Koji Kita3,6, Atsushi Tamura3,6, Takuya Hoshii5,6, Naoya Okada1,6, Kenzo Manabe1,6, Wataru Mizubayashi1,6, Hiroyuki Ota1,6, Takashi Matsukawa1,6, Shinji Migita1,6 (1.SFRC, AIST, 2.NIMS, 3.Univ. of Tokyo, 4.Tokyo City Univ., 5.Science Tokyo, 6.LSTC)

[11a-E201-8]Formation of ultra-scaled high-k gate stacks (CET 0.9 nm) by low-thermal-budget (500 °C) oxygen-passivated interfacial layer (O-PAS IL)

〇Yukinori Morita1,6, Takamasa Kawanago1,6, Takefumi Kamioka1,6, Yuichiro Mitani2,6, Toshihide Nabatame3,6, Takashi Onaya3,6, Naoki Fukata3,6, Wipakorn Jevasuwan3,6, Kazuhito Tsukagoshi3,6, Takuya Hoshii4,6, Kasidit Toprasertpong5,6, Atsushi Tamura5,6, Koji Kita5,6, Naoya Okada1,6, Kenzo Manabe1,6, Wataru Mizubayashi1,6, Hiroyuki Ota1,6, Takashi Matsukawa1,6, Shinji Migita1,6 (1.AIST, 2.Tokyo City Univ., 3.NIMS, 4.Science Tokyo, 5.The Univ. Tokyo, 6.LSTC)