[23p-12J-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies | The 71st JSAP Spring Meeting 2024

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Oral presentation13 Semiconductors : 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[23p-12J-1~10]13.5 Semiconductor devices/ Interconnect/ Integration technologies

Sat. Mar 23, 2024 1:30 PM - 4:45 PM JST
Sat. Mar 23, 2024 4:30 AM - 7:45 AM UTC

12J (Building No. 1)

Jiro Ida(Kanazawa Inst. of Tech.), Masaya Kawano(Univ of Tokyo)

1:30 PM - 1:45 PM JST(4:30 AM - 4:45 AM UTC)

[23p-12J-1]The 15th Silicon Technology Division Paper Award / Young Researcher Award Ceremony

〇Jiro Ida^1,2 (1.Chief Secretary of Silicon Technology Division, 2.Kanazawa Inst. Tech.)

1:45 PM - 2:15 PM JST(4:45 AM - 5:15 AM UTC)

[23p-12J-2][The 15th Silicon Technology Division Paper Award] Fabrication technique of ferroelectric Hf_xZr_1−xO₂ thin films using ALD-ZrO₂ nucleation layers and its application to MFS structures

〇Takashi Onaya^1,2,3,4, Toshihide Nabatame³, Mari Inoue³, Tomomi Sawada³, Hiroyuki Ota², Yukinori Morita² (1.GSFS, The Univ. of Tokyo, 2.AIST, 3.NIMS, 4.JSPS Research Fellow PD)

2:15 PM - 2:45 PM JST(5:15 AM - 5:45 AM UTC)

[23p-12J-3][The 15th Silicon Technology Division Paper Award Speech] 1T1C FeRAM memory array based on ferroelectric HZO

〇Jun Okuno¹, Takafumi Kunihiro¹, Kenta Konishi¹, Monica Materano², Tarek Ali³, Kati Kuehnel³, Konrad Seidel³, Thomas Mikolajick², Uwe Schroeder², Masanori Tsukamoto¹, Taku Umebayashi¹ (1.Sony Semiconductor Solutions, 2.NaMLab gGmbH, 3.Fraunhofer IPMS)

2:45 PM - 3:00 PM JST(5:45 AM - 6:00 AM UTC)

[23p-12J-4][The 15th Silicon Technology Division Young Researcher Award] Effect of Strain on Room-Temperature Spin Transport in Si_0.1Ge_0.9

〇Takahiro Naito¹, Michihiro Yamada^2,3, Youya Wagatsuma⁴, Kentarou Sawano⁴, Kohei Hamaya^3,5,1 (1.GSES, Osaka Univ., 2.JST-PRESTO, 3.CSRN, Osaka Univ., 4.Tokyo City Univ., 5.OTRI, Osaka Univ.)

3:00 PM - 3:15 PM JST(6:00 AM - 6:15 AM UTC)

[23p-12J-5][The 15th Silicon Technology Division Young Researcher Award] 3D integration using wafer-to-wafer bonding and its future

〇Fuya Nagano¹ (1.Tokyo Electron Kyushu Ltd.)

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)

[23p-12J-6]Influence of Characteristics of Bonding Dielectric Film on CMP

〇Kenta Hayama¹, Kohei Nakayama¹, Fumihiro Inoue¹ (1.YOKOHAMA Nat. Univ.)

3:45 PM - 4:00 PM JST(6:45 AM - 7:00 AM UTC)

[23p-12J-7]Characterization of SiCN Interfaces for Low Temperature Hybrid Bonding

〇Ryosuke Sato¹, Sodai Ebiko¹, Koki Onishi¹, Fumihiro Inoue¹ (1.YOKOHAMA Nat. Univ.)

4:00 PM - 4:15 PM JST(7:00 AM - 7:15 AM UTC)

[23p-12J-8]Study on Cu CMP Corrosion Depending on Underlayer Line Structure

〇Yuya Naito¹, Wada Junya¹, Hiroshi Itokawa¹, Masayoshi Tagami¹, Norio Ohtani¹, Masaru Kito¹ (1.KIOXIA Corporation)

4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[23p-12J-9]Area-selective LPCVD-Cu on L/S by using CuI-precursor

〇(B)Yu Miyamoto¹, Gento Toyoda¹, Satoshi Yamauchi¹ (1.Ibaraki Univ.)

4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[23p-12J-10]Formation of Ru crystal nuclei on inter-Layer dielectrics using new electrolytic technology

〇Haruo Iwatsu¹ (1.KMP Lavatory)

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