[A-0-1]Recent Progress and Potential of SIT
Jun-ichi Nishizawa(1.Research Institute of Electrical Communication, 2.Tohoku University)
1979 International Conference on Solid State Devices
Aug 27 - Aug 29, 1979The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
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1979 International Conference on Solid State Devices
Aug 27 - Aug 29, 1979The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
SearchSearch Results(125)
[A-0-2]MOS Devices Fabricated by Electron Beam Lithography
H. N. Yu(1.IBM T. J. Watson Research Center)
[A-0-3]BASIC TECHNOLOGY FOR VLSI
Yasuo Tarui(1.Cooperative Laboratories, 2.VLSI Technology Research Association)
[A-0-4]Recent Progress in Semiconductor Lasers
Izuo Hayashi(1.Central Research Laboratories Nippon Electric Co., Ltd.)
[A-1-1]Microstructure Fabrication, Science and Technology
E. D. Wolf(1.Cornell Univ.)
[A-1-2]X-Ray Lithography
Shin'ichi YAMAZAKI, Toa HAYASAKA(1.Musashino Electrical Communication Laboratory, 2.N.T.T.)
[A-1-3]Electron Image Projection
P. J. Daniel R. Kramer(1.Philips Research Laboratories)
[A-1-4]1:4 Demagnifying Electron Projection System
T. Asai, S. Ito, T. Eto, M. Migitaka(1.Cooperative Laboratories VLSI Technology Research Association)
[A-1-5]Electron Beam Mask Fabrication for MOSLSI's with 1 μm - 1.5 μm Design Rules
Shinji Okazaki, Kozo Mochiji, Eiji Takeda, Yoji Maruyama, Shojiro Asai(1.Central Research Laboratory, 2.Hitachi, Ltd.)
[A-1-6]Reactive Sputter Etching System with Floating Grid
H. Shibayama, T. Ogawa, K. Kobayashi, T. Hisatsugu(1.FUJITSU LABORATORIES LTD.)
[A-1-7]Low-frequency Low-noise Transistors Fabricated by Double Ion Implantation
K. Yagi, M. Tamura, Y. Yanagi, K. Inaniwa, T. Tokuyama(1.Central Reseach Laboratory, 2.Hitachi Ltd. Takasaki Works, 3.Hitachi Ltd.)
[A-1-8]Computer Aided Si-MOSFET Process Designing
Yasuo Ohno, Yuju Okuto(1.Central Research Labs, 2.Nippon Electric Co., Ltd.)
[A-1-9]Deposition of Silicon Nitride Films by High Rate Reactive Sputtering
Y. Hoshi, M. Naoe, S. Yamanaka(1.Faculty of Engineering, 2.Tokyo Institute of Technology)
[B-1-1]LSI Prospects for GaAs FET's
R. Zuleeg(1.McDonnell Douglas Astronautics Company)
[B-1-2]MSI HIGH SPEED LOW POWER GaAs INTEGRATED CIRCUITS
S. I. Long, B. M. Welch, R. C. Eden, F. S. Lee, R. Zucca(1.Rockwell International/Science Center)
[B-1-3]Low-Power High-Speed Integrated Logic with GaAs MOSFETs
Naoki Yokoyama, Takashi Mimura, Hirotsugu Kusakawa, Katsuhiko Suyama, Masumi Fukuta(1.Fujitsu Limited)
[B-1-4]High-Speed Enhancement-Mode GaAs MESFET Integrated Circuits
T. Mizutani, N. Kato, S. Ishida, K. Asai, Y. Sakakibara, K. Komatsu, M. Ohmori(1.Musashino Electrical Communication Laboratory, 2.Nippon Telegraph and Telephone Public Corporation)
[B-1-5]Integrated GaAs E-FET/Tunnel Diode Inverter and Memory Cell
Kurt Lehovec(1.University of Southern California)
[B-1-6]Power GaAs MESFETs with a Graded Recess Structure
Asamitsu HIGASHISAKA, Takashi FURUTSUKA, Yoichi AONO, Yoichiro TAKAYAMA, Fumio HASEGAWA(1.Central Research Laboratories, 2.Nippon Electric Co., Ltd.)
[B-1-7]Flip-Chip Mounted GaAs Power FET with Improved Performance in X to Ku Band
Y. Mitsui, M. Kobiki, M. Wataze, M. Otsubo, T. Ishii, S. Mitsui(1.Semiconductor Laboratory, 2.Mitsubishi Electric Corporation)
[A-2-1]Physical Effects in Short Channel MOS
Dr. John L. Moll, Dr. Edward Sun(1.Hewlett-Packard Laboratories)
[A-2-2]Non-thermal Carrier Generation in MOS Structures
Susumu KOHYAMA, Shouichi MIMURA, Hisakazu IIZUKA(1.Semiconductor Device Engineering Lab. Toshiba Corporation)
[A-2-3]DESIGN LIMITATION DUE TO SUBSTRATE CURRENTS AND SECONDARY IMPACT IONIZATION ELECTRONS IN NMOS LSI'S
Junichi Matsunaga, Masami Konaka, Susumu Kohyama, Hisakazu Iizuka(1.Research Laboratory NEC-TOSHIBA Information Systems Inc.)
[A-2-4]Near Ideal Si-SiO2 Interface
L. A. Kasprzak, A. K. Gaind(1.IBM Data Systems Division)
[A-2-5]ON Al-SiO2 INTERFACES AND OXIDATION TEMPERATURES
M. Av-Ron, M. Shatzkes, T. DiStefano, R. Gdula(1.IBM Data Systems Division T. J. Watson Research Center)
[A-2-6]Anodization of Silicon in RF induced Oxygen Plasma
Ho Quoc VU, Takuo SUGANO(1.Department of Electronic Engineering, 2.the University of Tokyo)
[A-2-7]P-CHANNEL VERSUS N-CHANNEL IN MOS-ICs OF SUBMICRON CHANNEL LENGTHS
Luong Mo DANG, Hiroshi IWAI, Yoshio NISHI, Shinji TAGUCHI(1.Toshiba R & D Center, 2.Toshiba Corporation c/o Horikawacho Works)
[A-3-1]Mechanisms of Laser Annealing
J. M. Poate(1.Bell Laboratories)
[A-3-2]APPLICATIONS OF SCANNING CW LASER AND ELECTRON BEAMS IN SEMICONDUCTOR PROCESSING
J. F. Gibbons(1.Stanford Electronics Laboratories)
[A-3-3]Short Channel MOS FET's Fabricated by Self-Aligned Ion Implantation and Laser Annealing
M. Miyao, M. Koyanagi, H. Tamura, N. Hashimoto, T. Tokuyama(1.Central Research Laboratory, 2.Hitachi Ltd.)
[A-3-4]Resistivity Reduction of Polycrystalline Silicon Films by Laser Annealing
Susumu KOHYAMA, Shinji ONGA, Kenji SHIBATA, Hisakazu IIZUKA(1.Semiconductor Device Engineering Lab. Toshiba Corporation)
[A-3-5]Improvement in Electrical Properties of Laser Annealed Ion Implanted GaAs
B. J. Sealy, M. H. Badawi, K. G. Stephens(1.Department of Electronic and Electrical Engineering, 2.University of Surrey)
[A-3-6]Is SOS ready for VLSI?
J. BOREL(1.LETI-EFCIS)
[A-3-7]High Speed C-MOS IC Using Buried SiO2 Layer Formed by Ion Implantation
Katsutoshi Izumi, Masanobu Doken, Hisashi Ariyoshi(1.Research and Development Bureau, 2.and Musashino Electrical Communication Laboratory N.N.T.)
[A-3-8]Charge Pumping Memory with SOS-MOS Transistors
N. Sasaki, M. Nakano, T. Iwai(1.IC Division, 2.Fujitsu Limited)
[A-3-9]Electron-Hole Pair Generation at the Silicon-Sapphire Interface of SOS Devices
K. Lehovec, Shi-Tron Lin(1.University of Southern California)
[A-4-1]Yield Modeling of Bipolar Integrated Circuits
D. Kranzer, H. Murrmann(1.Siemens AG, 2.Integrated Circuit Division)
[A-4-2]A High Speed Schottky 4k-bit PROM using Diffused Eutectic Aluminum Process (Deap)
Toshitaka Fukushima, Koji Ueno(1.IC Division, 2.Fujitsu Lid.)
[A-4-3]A New Transistor Structure for High Speed Bipolar LSI
H. Sakurai, Y. Akasaka, K. Kijima(1.LSI Development Laboratory, 2.Mitsubishi Electric Corporation)
[A-4-4]A single-chip speech synthesizer for the PARCOR CODEC
N. Miyahara, S. Yamada, M. Yamane, K. Saito, E. Arai, M. Sunazawa(1.Musashino Electrical Communication Laboratory, 2.N.T.T.)
[A-4-5]ADAPTIVE WAFER SCALE INTEGRATION
Yukun Hsia, Gareth C. C. Chang, F. Dennis Erwin(1.McDonnell Douglas Astronautics Company)
[A-4-6]A 3000-Gate CMOS Masterslice LSI
M. Ashida, R. Hoshikawa, N. Matsumura, J. Ishii, H. Ichikawa, Y. Sugiura, K. Inayoshi(1.Fujitsu Limited, 2.IC Division)
[B-2-1]Interface Effects on Drain Current Instabilities in GaAs MESFETs with Buffer Layer
T. Itoh, H. Yanai(1.Department of Electronic Engineering, 2.University of Tokyo)
[B-2-2]Investigation on the Drift of GaAs MESFET's by High Frequency Parameters
K. Ohata, H. Itoh, F. Hasegawa(1.Central Research Laboratories, 2.Nippon Electric Co., Ltd.)
[B-2-3]Tin Diffusion from Doped Oxides for Fabricating GaAs Microwave Devices
N. Arnold, H. Dambkes, K. Heime(1.University of Duisburg, 2.FB 9, 3.Solid-State Electronics Department)
[B-2-4]A New Type GaAlAs Monolithic Lensed LED
M. Abe, O. Hasegawa, Y. Komatsu, Y. Toyama(1.Fujitsu Laboratories Limited)
[B-2-5]High-Brightness Green-Light Emitting Thin-Film Electroluminescent Device
K. Okamoto, Y. Hamakawa(1.Faculty of Engineering Science, 2.Osaka University)
[B-2-6]Bright Pure Green Emission from N-free GaP LED's
J. Nishizawa, Y. Okuno, M. Koike, F. Sakurai(1.Research Institute of Electrical Communication, 2.Tohoku University Semiconductor Research Institute)
[B-2-7]pInxGa1-xSb-nGa1-yAlySb Heterojunction Photodiodes
T. Mizuki, Y. Sugimoto, A. Tanaka, T. Sukegawa(1.Research Institute of Electronics, 2.Shizuoka University)
[B-3-1]Mode Control in Semiconductor Lasers
Ryoichi Ito(1.Central Research Laboratory, 2.Hitachi, Ltd.)
125 results ( 1 - 50 )
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