Session Details

[8a-N322-1~9]13.7 Compound and power devices, process technology and characterization

Mon. Sep 8, 2025 9:30 AM - 12:00 PM JST
Mon. Sep 8, 2025 12:30 AM - 3:00 AM UTC
N322 (Lecture Hall North)

[8a-N322-1]High-Speed 3D Imaging of Laser-Induced Strain in a GaN Free-Standing Substrate by Stimulated Raman Scattering Microscopy

〇Yusuke Wakamoto1, Shun Takahashi1, Atsushi Tanaka2, Takuya Maeda1, Yasuyuki Ozeki1 (1.UTokyo, 2.Nagoya Univ.)

[8a-N322-2]Determination of band splitting and hole effective mass of valence band of GaN by angle-resolved photoemission spectroscopy

〇AKihira Munakata1, Seishu Arikawa1, Yoshinori Nakagawa2, Masaki Kobayashi1 (1.Univ. of Tokyo, 2.Nichia Corporation)

[8a-N322-3]Characterization of traps in quartz-free hydride vapor phase epitaxy-grown high-purity n-type GaN by capacitance transient spectroscopy

〇Yusuke Hirayama1, Masahiro Horita1,2, Jun Suda1,2, Shota Kaneki3, Hajime Fujikura3 (1.Nagoya Univ., 2.Nagoya Univ. IMaSS, 3.Sumitomo Chemical)

[8a-N322-4]Effect of GaOx interfacial layer on barrier heights of n-type GaN Schottky junctions

〇Ryo Sakai1, Masahiro Hara1, Mikito Nozaki1, Takuma Kobayashi1, Heiji Watanabe1 (1.UOsaka)

[8a-N322-5]Investigation of I-V Characteristics of GaN Needle-Contact Schottky Barrier Diodes

〇Riku Ando1, Ryota Akaike1,2, Hiroki Yasunaga2,3, Takao Nakamura1,2, Yoriko Suda4, Narihiko Maeda4, Hideto Miyake1,2 (1.Grad. Sch. of Eng. Mie Univ., 2.IC-SDF, 3.ORIP, 4.Tokyo Univ. of Technology)

[8a-N322-6]Characterization of Interface Properties in Al2O3/n-GaN MOS Structures with Mist-CVD Fabricated Al2O3 Thin Film

〇Hadirah Radzuan1, Ryota Ochi2, Yusui Nakamura1, Takemoto Sato2, Zenji Yatabe1 (1.Kumamoto Univ., 2.Hokkaido Univ.)

[8a-N322-7]Reduction of hole traps in SiO2/GaN MOS structures with a thin Mg-based interlayer

〇Yuichi Sakagami1, Masahiro Hara1, Mikito Nozaki1, Takuma Kobayashi1, Heiji Watanabe1 (1.Osaka Univ.)

[8a-N322-8]Reduction of hole traps near SiO2/p-GaN MOS interfaces by high-pressure oxygen annealing

〇Masahiro Hara1, Mikito Nozaki1, Takuma Kobayashi1, Heiji Watanabe1 (1.UOsaka)

[8a-N322-9]All Ion-implanted Vertical GaN Planar-Gate MOSFETs Fabricated on 4-inch Substrates

〇Nao Suganuma1, Katsunori Ueno1, Ryo Tanaka1, Tsurugi Kondo1, Hirohisa Hirai2, Akira Nakajima2, Shinsuke Harada2, Shinya Takashima1 (1.Fuji Electric, 2.AIST)