[A-0-0]VLSI and Artificial Intelligence Problems in the 80s the Computer Industry will Face
Taiyu Kobayashi(1.Fujitsu Limited)
1980 Conference on Solid State Devices
Aug 26 - Aug 27, 1980The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
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1980 Conference on Solid State Devices
Aug 26 - Aug 27, 1980The Tokyo Chamber of Commerce and Industry, Tokyo, Japan
You can search for presentations in this event.
SearchSearch Results(56)
[A-0-1]Heterostructures for Everything: Device Principles of the 1980's?
Herbert Kroemer(1.Electrical and Computer Engineering, University of California)
[A-1-1]MOSFET DEVELOPMENT IN IBM - 1963 TO PRESENT
D. L. Critchlow(1.Data Systems Division, International Business Machines Company)
[A-1-2]BOW AND WARPAGE OF SILICON WAFERS
Shin. Takasu, H. Otsuka, N. Yoshihiro, T. Oku, M. Ishida(1.VLSI Cooperative Laboratories)
[A-2-1]Thermal Nitridation of Silicon in Advanced LSI Processing
T. Ito, H. Ishikawa, Y. Fukukawa(1.FUJITSU LABORATORIES LTD.)
[A-2-2]Silicon Graphoepitaxy
Michael W. GEIS, Dale C. FLANDERS, Donald J. SILVERSMITH, Dimitri A. ANTONIADIS, Henry I. SMITH(1.Lincoln Laboratory, Massachusetts Institute of Technology)
[A-2-3]Oriented Crystal Growth of Si on SiO2 Patterns by Pulse Ruby Laser Annealing
M. Tamura, H. Tamura, T. Tokuyama(1.Central Research Laboratory, Hitachi Ltd.)
[A-2-4]Formation of a Double-Hetero Si/CoSi2/Si Structure Using Molecular Beam and Solid Phase Epitaxies
Shuichi Saitoh, Hiroshi Ishiwara, Seijiro Furukawa(1.Graduate School of Science and Engineering, Tokyo Institute of Technology)
[A-2-5]A New Self-Aligned Framed Mask Method for Selective Oxidation
K. Minegishi, K. Imai, K. Kiuchi, K. Hirata, Y. Yoriume(1.Musashino Electrical Communication Laboratory, NTT)
[A-2-6]Negative Patterning of AZ1350J by Electron-beam Desensitization of Photo-sensitive Compound
Kozo Mochiji, Yoji Maruyama, Fumio Murai, Shinji Okazaki Yutaka Takeda, Shojiro Asai(1.Central Research Laboratory, Hitachi Ltd.)
[A-2-7]High Resolution Fabrication of Submicron Structures by Ion Beam Lithography
Kazuyuki Moriwaki, Hiroaki Aritome, Susumu Namba(1.Faculty of Engineering Science, Osaka University)
[B-1-1]Fibre Optics Development in the 1980s
C. Kao(1.ITT)
[B-1-2]RECENT PROGRESS IN VAD FIBER FABRICATION PROCESS
Nobuo INAGAKI, Takao EDAHIRO, Motohiro NAKAHARA(1.Ibaraki Electrical Communication Laboratory, N.T.T.)
[B-2-1]LPE and Characteristics of GaInAsP/InP 1.5μm Region Laser Diodes
H. Nagai(1.Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation)
[B-2-2]LOW EPD AND HIGH AVALANCHE GAIN OF LATTICE-MISMATCHED In0.52Ga0.48As DIODES ON InP SUBSTRATE
Y. Takeda, A. Sasaki(1.Department of Electrical Engineering, Kyoto University)
[B-2-3]Integration of a laser diode and a twin FET
Hideaki Matsueda, Tadashi Fukuzawa, Takao Kuroda, Michiharu Nakamura(1.Central Research Laboratory, Hitachi Ltd.)
[B-2-4]In-Line Holographic Lenses of High Numerical Aperture
C. Kojima, K. Miyahara, K. Hasegawa, T. Otobe, H. Ohki(1.Sony Corporation Research Center, 2.Sony Corporation Audio Technology Center)
[B-2-5]Visible Semiconductor Laser
W. Susaki, S. Takamiya(1.LSI Research and Development Laboratory, Mitsubishi Electric Corporation)
[B-2-6]LPE Growth and Photoluminescence of Visible-Semiconductor-Laser Material In1-xGaxP1-yAsy on GaAs
A. Suzuki, H. Kyuragi, S. Matsumura, H. Matsunami(1.Department of Electronics, Kyoto University)
[B-2-7]Low-Threshold-Voltage AC Thin-Film Electroluminescent Device
K. OKAMOTO, Y. NASU, M. OKUYAMA, Y. HAMAKAWA(1.Faculty of Engineering Science, Osaka University)
[A-3-1]A SIPOS-Si Heterojunction Transistor
Takeshi Matsushita, Hisao Hayashi, Norikazu Oh-uchi, Hisayoshi Yamoto(1.Semiconductor Division, SONY Corporation)
[A-3-2]V-Bipolar Device Utilizing Built-in Stress Gradient
Yozo Kanda(1.Department of Physics, Hamamatsu University School of medicine)
[A-3-3]Gain Improvement by Self-Neutralization of Microwave SIT
Masao Aiga, Yukio Higaki, Mari Kato, Yoshinori Yukimoto(1.Mitsubishi Electric Corporation, LSI Research and Development Laboratory)
[A-3-4]Design Considerations for High Power GTOs
Makoto Azuma, Mamoru Kurata, Hiromichi Ohashi(1.Toshiba Research and Development Center)
[A-3-5]4000V, 1500A Light Triggered Thyristor
T. Nakagawa, T. Miyajima, A. Kawakami, A. Tada, K. Yamanaka, K. Ohtaki(1.Kitaitami Works, Mitsubishi Electric Corporation, 2.LSI R & D Lab., Mitsubishi Electric Corporation)
[A-3-6]A HIGH CURRENT GAIN, HIGH SPEED POWER GATE ASSOCIATED TRANSISTOR
Hisao KONDO, Yoshinori YUKIMOTO(1.LSI Research and Development Laboratory, Mitsubishi Electric Corporation)
[A-3-7]150V High Voltage Linear IC Technology
I. IMAIZUMI, M. KIMURA, M. YOSHIMURA, T. YAMAGUCHI(1.Central Research Laboratory, Hitachi Ltd., 2.Musashi Works, Hitachi Ltd.)
[A-4-1]High Speed MoSi2 gate CMOS/SOS Devices
Yoshihisa MIZUTANI, Kenji MAEGUCHI, Tohru MOCHIZUKI Minoru KIMURA, Mitsuo ISOBE, Yukimasa UCHIDA, Hiroyuki TANGO(1.Semiconductor Device Engineering Laboratory TOSHIBA CORPORATION)
[A-4-2]High Speed 4 k bit Static RAM with Silicide Coated Wiring
M. Morimoto, M. Sugimoto, K. Terada, K. Takahashi, T. Ishijima, H. Muta, S. Suzuki(1.Central Research Labs., Nippon Electric Co., Ltd.)
[A-4-3]Custom LSI Process with a Micron Geometry, Partially Using Electron Beam Direct Writing
N. Endo, Y. Kurogi, K. Suzuki, M. Sugimoto, M. Morimoto, Y. Iida, K. Mori(1.Central Research Laboratories, Nippon Electric Co., Ltd.)
[A-4-4]N-channel MNOS EAROM for TV Electronic Tuning System
S. Saito, K. Hashimoto, Y. Uchida, N. Endo(1.Semiconductor Device Engineering Laboratory Toshiba Corporation)
[A-4-5]Soft Error Improvement in MOS RAM's by the use of Epitaxial Substrate
S. SATOH, M. DENDA, T. FUKUMOTO(1.LSI R&D Laboratory, Mitsubishi Electric Corporation)
[A-4-6]Flat Emitter Transistor with Self-Aligned Base
T. Fujita, H. Yamada, T. Takemoto, T. Komeda(1.Semiconductor Research Laboratory, Matsushita Electric Industrial Co., Ltd.)
[A-4-7]High Speed Bipolar ICs Using Super Self-aligned Process Technology
T. Sakai, Y. Kobayashi, H. Yamauchi, M. Sato, T. Makino(1.Nippon Tel-Tel Public Corp. Musashino Electrical Communication Lab.)
[A-4-8]A High Performance I2L Compatible with Sub-nanosecond ECL devices
T. Hirao, K. Murakami, H. Sakurai(1.LSI R&D, Mitsubishi Electric Corporation)
[B-3-1]ION IMPLANTATION INTO COMPOUND SEMICONDUCTORS
H. Nishi, H. Hashimoto(1.Fujitsu Limited)
[B-3-2]Planar GaAs ICs Using Multiple Localized Ion-Implantation
H. Kusakawa, K. Suyama, S. Okamura, M. Fukuta(1.Fujitsu Limited)
[B-3-3]P-Column Gate Field Effect Transistor
K. Asai, Y. Ishi-i, Y. Kawasaki, K. Kurumada(1.Musashino Electrical Communication Lab., NTT Public Corporation)
[B-3-4]Improvement in CZ Wafers by Reducing Oxygen Impurity
Keigo Hoshikawa, Hiroki Kohda, Kenji Ikuta(1.Musashino Electrical Communication Laboratory, NTT)
[B-3-5]Non-destructive Analysis of the Si-SiO2 interface by Electron Energy Loss Spectroscopy Study
T. Ito, M. Iwami, A. Hiraki(1.Department of Electrical Engineering, Osaka University)
[B-3-6]Effect of Long Term Stress on Hot Electron Trapping
H. MATSUMOTO, K. SAWADA, S. ASAI, M. HIRAYAMA, K. NAGASAWA(1.LSI R & D Laboratory, Mitsubishi Electric Corp.)
[B-3-7]Isothermal Capacitance Transient Spectroscopy
Hideyo OKUSHI, Yozo TOKUMARU(1.Electrotechnical Laboratory)
[B-4-1]Optical, Electrical and Structural Properties of Plasma-Deposited Amorphous Silicon
K. Tanaka, K. Nakagawa, A. Matsuda, M. Matsumura, H. Yamamoto, S. Yamasaki, H. Okushi, S. Iizima(1.Electrotechnical Laboratory)
[B-4-2]Properties of a Fluorinated Heat-Resisting Amorphous-Silicon Containing no Hydrogen
Hideki MATSUMURA, Seijiro FURUKAWA(1.Department of Applied Electronics, Tokyo Institute of Technology)
[B-4-3]Novel Deposition Technique of a-Si:H -- Silane Glow Discharge in Magnetic Field --
T. Hamasaki, M. Hirose, H. Kurata, M. Taniguchi, Y. Osaka(1.Department of Electrical Engineering, Hiroshima University)
[B-4-4]Improvement of The Open Circuit Voltage of Amorphous Silicon Solar Cells
Setsuo Kaneko, Takeshi Saito(1.Central Research Laboratories, Nippon Electric Company, Ltd.)
[B-4-5]Amorphous SixGe1-x for High Performance Solar Cells
G. Nakamura, K. Sato, Y. Yukimoto, K. Shirahata, T. Murahashi, K. Fujiwara(1.Semiconductor R & D Dept., LSI Research and Development Laboratory, Mitsubishi Electric Corp.)
[B-4-6]Fabrication and Properties of Diffused Solar Cells Using Solar-Grade Silicon Prepared by Fluidized-Bed Reactor
S. Matsubara, E. Kuroda, T. Warabisako, T. Saitoh, T. Tokuyama Y. Enomoto, K. Kaneko, N. Hasegawa(1.Central Research Laboratory, Hitachi Ltd., 2.Research & Development Laboratory, Shin-Etsu Chemical Co. Ltd.)
[B-4-7]Electrophotographic Properties of RF Discharge-Produced Amorphous Si:H Film
Nobuyuki YAMAMOTO, Yoshikazu NAKAYAMA, Kazuki WAKITA, Masao NAKANO, Takao KAWAMURA(1.College of Engineering, University of Osaka Prefecture)
[B-4-8]A Proposed Novel Amorphous-Silicon Image Sensor
Hiroshi Hayama, Yasuo Nara, Kohichiro Ishibashi, Masakiyo Matsumura(1.Department of Physical Electronics, Tokyo Institute of Technology)
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