[OP]Opening Remarks (movie)
〇Atsushi Kurobe(General Chair,Organizing Committee)
2020 International Conference on Solid State Devices and Materials
2020年9月27日〜9月30日
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2020 International Conference on Solid State Devices and Materials
2020年9月27日〜9月30日
当該イベント内で検索します。
検索する検索結果(413)
[OP]Opening Remarks (movie)
〇Mutsuko Hatano(President, The JapanSociety of Applied Physics)
[PL-01 (Plenary)]How Fugaku became the first Exascale Machine, and how our Journey towards FugakuNeXT will Continue
〇Satoshi Matsuoka(RIKEN Center for Computational Science / Tokyo Institute of Technology)
[PL-02 (Plenary)]A New Metric for Gauging Progress of Semiconductor Technology
〇H.-S. Philip Wong(TSMC / Stanford University)
[PL-03 (Plenary)]Engineering qubits in silicon with atomic precision
〇Michelle Y. Simmons(Univ. of New South Wales/Silicon Quantum Computing Pty Ltd.)
[PL-04 (Plenary)]Organic Electronics — Retrospective and Outlook
〇Ching W. Tang(Hong Kong Univ. of Science and Technology)
[AW]Award Ceremony
[A-1-01]Charging-induced stabilization of ferroelectric orthorhombic HfO2 films:first-principles study on key growth conditions
〇Kazuaki Arai1, Yuto Shiraishi1, Riki Nagasawa1, Masaaki Araidai2, Kenji Shiraishi2, Takasi Nakayama1(1. Chiba Univ.(Japan), 2. Nagoya Univ.(Japan))
[A-1-02]Critical Impact of Ferroelectric-Phase Formation Annealing on MFIS Interface of HfO2-Based Si FeFETs
〇Kasidit Toprasertpong1, Kento Tahara1, Taichiro Fukui1, Zaoyang Lin1, Kouhei Watanabe1, Mitsuru Takenaka1, Shinichi Takagi1(1. Univ. of Tokyo(Japan))
[A-1-03]Relationship between the Waking-up Effect and Structural Distortion in Ferroelectric HfO2 characterized by X-ray Diffraction
〇Siri Nittayakasetwat Nittayakasetwat1, Koji Kita1(1. Univ. of Tokyo(Japan))
[A-1-04]Understanding wet annealing effect on phase transition and ferroelectric phase formation for Hf1-xZrxO2 film
〇Shigehisa Shibayama1, Jotaro Nagano1, Mitsuo Sakashita1, Osamu Nakatsuka1,2(1. Nagoya Univ.(Japan), 2. IMaSS, Nagoya Univ.(Japan))
[A-1-05]Thickness Scaling on Ferroelectric Al0.8Sc0.2N Films
〇Sunglin TSAI1, Takuya Hoshii1, Hitoshi Wakabayashi1, Kazuo Tsutsui1, Kuniyuki Kakushima1(1. Tokyo Inst.of Tech.(Japan))
[A-1-06]Design and Simulation of Highly-Efficient Metal-Ferroelectric-Nanosheet Line-Tunnel FETs for Sub-5-nm Technology Nodes
〇Narasimhulu Thoti1, Yiming Li Li1, Sekhar Reddy Kola1, Seiji Samukawa2(1. National Chiao Tung Univ.(Taiwan), 2. Tohoku Univ.(Japan))
[A-3-01 (Invited)]Materials and Layer Transfer Process Technologies for Heterogeneous 3D Integration of Germanium on Silicon
〇Willy Rachmady1(1. Intel Corporation(United States of America))
[A-3-02]Implementation of Asymmetric Channel Implant in FDSOI Technology for Superior Analog Performance
〇Luca - Pirro1, Alban Zaka1, Tom Hermann1, Martin Majer1, Jan Hoentschel1(1. GLOBALFOUNDRIES(Germany))
[A-3-03]Sub-35 nm SiC Strained nMOSFETs with Super-400 GHz fT for mm-wave CMOS Design
〇Jyh-Chyurn Guo1, Adhi Cahyo Wijaya1, Jinq-Min Lin1(1. National Chiao-Tung University(Taiwan))
[A-3-04]New Observation and Mechanism of Flicker Noise and Random Telegraph Noise in Sub-40nm SiC Strained nMOSFETs
〇Jyh-Chyurn Guo1, Adhi Cahyo Wijaya1, Jinq-Min Lin1(1. National Chiao-Tung University(Taiwan))
[A-3-05]Investigation of Capacitor-less Integrate and Fire Neuron by Using Double Gate PN-Body Tied SOI-FET
〇Takayuki Mori1, Jiro Ida1(1. Kanazawa Inst. of Tech.(Japan))
[A-4-01 (Invited)]Ge and GeSn-based Nano-electronic Devices and Photo Detectors
〇Xiao Gong1, Ying Wu1, Dian Lei1, Shengqiang Xu1, Kaizhen Han1(1. National University of Singapore(Singapore))
[A-4-02 (Late News)]Thermally Oxidized Yttrium and Scandium Gate Dielectrics on Germanium with High Interfacial and Film Qualities
〇Hiroki Kanakogi1, Wei-Chen Wen1, Keisuke Yamamoto1, Dong Wang1, Hiroshi Nakashima2(1. Interdisciplinary Graduate School of Engineering Sci., Kyushu Univ.(Japan), 2. Global Innovation Center, Kyushu Univ.(Japan))
[A-4-03]On-Wafer Electron Beam Detectors by Floating-Gate FinFET Technologies
Chih-An Yang1, 〇Jiun Shi Wang1, Jeng Burn Lin2, Jung Chrong Lin1, Chin Ya King1(1. Inst. of Electronics Engineering, National Tsing Hua Univ., Hsinchu(Taiwan), 2. Inst. of Photonics Technologies, National Tsing Hua Univ., Hsinchu(Taiwan))
[A-4-04]On-Wafer Recorders for Assessing Wide Range Plasma Induced Charging Effect in FinFET Processes
Chi - Su1, 〇Yi-Jie Chao1, Chring-Jung Lin1, Ya-Chin King1(1. National Tsing Hua Univ.(Taiwan))
[A-4-05]White Spots Caused by Junction Leakage in Small Pixels of CMOS Image Sensor
〇Jeongjin Cho1, Minji Jung1, Taesub Jung1, Masato Fujita1, Kyungho Lee1, Youjin Jung1, Sungmin Ahn1, Howoo Park2, Dukseo Park2, Younguk Song2, Takashi Nagano1, JungChak Ahn1, Yongin Park1(1. System LSI Division, Samsung Electronics Co., Ltd(Korea), 2. Foundry Division, Samsung Electronics Co., Ltd(Korea))
[A-5-01 (Invited)]Towards extreme scaling of logic standard cells using Forksheet devices
〇Pieter Weckx1(1. imec(Belgium))
[A-5-02]This papar will be presented on Sept. 30 in Room A from 10:30 (after [A-7] session)
[A-5-03]Evaluation of the impact of source/drain epi implementation on logic performance using combined process and circuit simulation
〇Assawer - Soussou1, Tom - Schram2, Kenichi - Miyaguchi2, Ivan - Chakarov3, Bertrand - Parvais2, Joseph - Ervin3(1. COVENTOR(France), 2. IMEC(Belgium), 3. COVENTOR (US)(United States of America))
[A-5-04]Variability and Corner Effect of GAA p-Type Poly-Si JunctionlessNanowire/Nanosheet Transistors
〇Min-Ju Ahn1, Takuya Saraya1, Masaharu Kobayashi1, Toshiro Hiramoto1(1. Inst. of Indus. Sci., Univ. of Tokyo(Japan))
[A-5-05 (Late News)]TCAD Simulation of Phonon Thermal Transport in a Semiconductor Device
〇Junichi Hattori1, Tsutomu Ikegami1, Koichi Fukuda1(1. AIST(Japan))
[A-6-01 (Invited)]Metal-Assisted Solid Phase Crystallization of Vertical Si Channel in 3D Flash Memory
〇Hidenori Miyagawa1, Haruka Kusai1, Riichiro Takaishi1, Tomoya Kawai1, Yuuichi Kamimuta1, Toshiya Murakami1, Keiko Ariyoshi1, Takanori Asano1, Masakazu Goto1, Makoto Fujiwara1, Yuichiro Mitani1, Tomoyuki Obu2, Hideaki Aochi1(1. Kioxia Corp.(Japan), 2. Western Digital Corp.(Japan))
[A-6-02]Origin of Fermi Level De-Pinning of Metal Silicide, Rare-earth arsenide, TiN and Bi
Schottky Barriers
〇John Robertson1, Zhaofu Zhang1, Yuzheng Guo2(1. Cambridge Univ.(UK), 2. Swansea Univ.(UK))
[A-6-03]Fermi-level Depinning of Metal-n-Ge by Carbon Nanotube Film Insertion
Yuning Wei1,2, Xuqi Yang1,2, Jianwei Zhang3,4, Chang Liu1,2, 〇Chi Liu1, Dongming Sun1,2(1. Inst. Metal Research, CAS(China), 2. Univ. Science and Technology of China(China), 3. Changchun Inst. Optics, Fine Mechanics and Physics, CAS(China), 4. Univ. CAS(China))
[A-6-04]Chemical Structure of SiN Films Deposited on High Aspect Trench by Plasma Enhanced Atomic Layer Deposition
〇Tappei Nishihara1, Ryo Yokogawa1,2, Yuji Otsuki3, Munehito Kagaya3, Atsushi Ogura2,1(1. Meiji Univ.(Japan), 2. Meiji Renewable Energy Lab.(Japan), 3. Tokyo Electron Technology Solutions Ltd.(Japan))
[A-6-05]Millisecond Post Deposition Annealing for Improving the EOT and Dit in TiN/HfO2/SiO2/Si Gate Stacks using Flash Lamp Annealing
〇Hikaru Kawarazaki1, Akitsugu Ueda1, Shinichi Kato1, Kento Izumi2, Yasuo Nara2(1. SCREEN Semiconductor Solutions Co., Ltd.(Japan), 2. Univ. of Hyogo(Japan))
[A-6-06]ON current enhancement and single-electron transport in tunnel FETs by a new isoelectronic trap impurity of beryllium
〇Yoshisuke Ban1, Kimihiko Kato2, Shota Iizuka2, Satoshi Moriyama3, Koji Ishibashi1, Keiji Ono1, Takahiro Mori2(1. RIKEN(Japan), 2. AIST(Japan), 3. Tokyo Denki Univ. (TDU)(Japan))
[A-7-01 (Invited)]Circuit and Package Co-design for 3D Integration
〇Tadahiro Kuroda1(1. Univ. of Tokyo(Japan))
[A-7-02]A Self-Bias NAND Gate and its Application to Non-Overlapping Clock Generator for Extremely Low-Voltage CMOS LSIs
〇Hikaru Sebe1, Kaori Matsumoto2, Ryo Matsuzuka1, Osamu Maida1, Daisuke Kanemoto1, Tetsuya Hirose1(1. Osaka Univ.(Japan), 2. Kobe Univ.(Japan))
[A-7-03]Nonvolatile SRAMs Enabled by Hysteretic Negative-Capacitance FETs- A Comparative Study of Novel 9T and 8T nvSRAMs
〇Yi Jui Wu1, Wei Xiang You1, Pin Su1(1. National Chiao Tung University(Taiwan))
[A-5-02]A Triple-Deck CFET Structure with an Integrated SRAM Cell for the 2nm Technology Node and Beyond
〇Bingqi Sun1, Qingpeng Wang2, Shaofeng Yu1(1. Fudan University(China), 2. Coventor, LamResearch Company(United States of America))
[B-10-01]Sidewall Erased Multiple-Time Programmable Memory Cells in FinFET Technologies
〇Chun-Yu - Chuang1, Chrong-Jung - Lin1, Ya-Chin - King1(1. National Tsing Hua Univ.(Taiwan))
[B-10-02]HfN Multi Charge Trapping Layers for Hf-based MONOS Nonvolatile Memory
〇Shun-ichiro Ohmi1, Yusuke Horiuchi1, Hiroki Morita1, Akio Ihara1, Jooyoung Pyo1(1. Tokyo Tech(Japan))
[B-10-03]80nm Tall Thermally Stable Cost Effective FinFETs for Advanced DRAM Periphery Devices for AI/ML and Automotive Applications
〇Alessio Spessot1, Romain Ritzenthaler1, Eugenio Dentoni Litta1, Emmanuel Dupuy1, Barry O’Sullivan1, Joao Bastos1, Elena Capogreco1, Kenichi Miyaguchi1, Vladimir Machkaoutsan2, Younggwang Yoon3, Pierre Fazan2, Horiguchi Naoto1(1. imec(Belgium), 2. Micron (Belgium), 3. SK Hynix(Belgium))
[B-10-04 (Invited)]Overcoming the Endurance-Retention Trade-Off in CBRAM: the Introduction of Co as Active Electrode
〇Attilio Belmonte1(1. imec(Belgium))
[B-10-05]In situ TEM Observation of CBRAMs during Digital and Analog Switching
〇Satoshi Muto1, Tsutomu Nakajima1, Atushi Tsurumaki-Fukuchi1, Masashi Arita1, Yasuo Takahashi1(1. Hokkaido Univ.(Japan))
[B-10-06 (Late News)]Designing a Filament in Resistive Random Access Memory Based on Thermal Flow Control
〇Yuta Sasaki1, Kentaro Kinoshita1(1. Tokyo Univ. of Sci.(Japan))
[B-2-01]Impact of Zr Concentration on Time-Dependent Dielectric Breakdown of HfZrO-based Ferroelectric Tunnel Junction (FTJ) Memory
〇Marina Yamaguchi1, Kensuke Ota1, Shosuke Fujii1, Reika Ichihara1, Kazuhiro Matsuo1, Kota Takahashi1, Yuta Kamiya1, Masumi Saitoh1(1. Kioxia Corp.(Japan))
[B-2-02]Resistive switching in two-terminal HfO2/SiO2 stack with interface dipole modulation
〇Noriyuki - Miyata1, Kyoko Sumita1, Akira Yasui2, Reito Wada3, Hiroshi Nohira3(1. AIST(Japan), 2. JASRI(Japan), 3. Tokyo City University(Japan))
[B-2-03]New Material Approach to Enhance Spontaneous Polarization in Ferroelectric HfO2
〇Kota Takahashi1, Kazuhiro Matsuo1, Yuta Kamiya1, Kunifumi Suzuki1, Kiwamu Sakuma1, Masumi Saitoh1(1. Kioxia Corp.(Japan))
[B-2-04]Antiferroelectricity and Cycling Behavior of ALD ZrO2 Ultra-thin Films
〇Xuan Luo1, Kasidit Toprasertpong1, Mitsuru Takenaka1, Shinichi Takagi1(1. Univ. of Tokyo(Japan))
[B-2-05 (Invited)]Introduction to FeFET Technology
〇Sven Beyer1(1. GrobalFoundaries(Germany))
[B-2-06]Variability Analysis for Ferroelectric FET Nonvolatile Memories Considering Fluctuations due to Trapped Charges
〇You Sheng Liu1, Pin Su1(1. National Chiao Tung University(Taiwan))
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