Session Details

[16p-C302-1~18]13.5 Semiconductor devices/ Interconnect/ Integration technologies

Mon. Sep 16, 2024 1:00 PM - 6:15 PM JST
Mon. Sep 16, 2024 4:00 AM - 9:15 AM UTC
C302 (Hotel Nikko 30F)
Masaharu Kobayashi(Univ. of Tokyo), Hitoshi Wakabayashi(Tokyo Tech), Shunri Oda(Tokyo Inst. of Tech.)

[16p-C302-1][Fellow International 2024 Special Lecture] 2D Materials - Powering the Next Era of Energy-Efficient Electronics

〇Kaustav Banerjee1 (1.University of California)

[16p-C302-2]Ohmic Contact to n-Ge by Bi2Te3/Ge quasi-vdW Junction

〇WENHSIN CHANG1, S. HATAYAMA1, N. OKADA1, T. IRISAWA1, Y. SAITO1,2 (1.AIST, 2.Tohoku Univ.)

[16p-C302-3]Passivation of GeSn surface using ALD-GeO2

〇Yoshiki Kato1, Mitsuo Sakashita1, Masashi Kurosawa1, Osamu Nakatsuka1,2, Shigehisa Shibayama1 (1.Grad. Sch. Eng., Nagoya Univ., 2.IMaSS, Nagoya Univ.)

[16p-C302-4][INVITED] Reliability degradation mechanism in atomic layer deposited amorphous/polycrystalline In-Ga-O channel transistors

〇Takanori Takahashi1, Mutsunori Uenuma2, Masaharu Kobayashi3,4, Yukiharu Uraoka1 (1.NAIST, 2.AIST, 3.IIS., Univ. of Tokyo, 4.Univ. of Tokyo)

[16p-C302-5]A Nanosheet Oxide Semiconductor FET Using ALD InZnOx Channel

〇(D)Sunghun Kim1, Kaito Hikake1, Zhuo Li1, Takuya Saraya1, Toshiro Hiramoto1, Masaharu Kobayashi1,2 (1.IIS, The Univ. of Tokyo, 2.d.lab, The Univ. of Tokyo)

[16p-C302-6]A Nanosheet Oxide Semiconductor FET Using ALD InGaZnOx Channel

〇(M2)Kota Sakai1, Kaito Hikake1, Takuya Saraya1, Toshiro Hiramoto1, Masaharu Kobayashi1,2 (1.IIS, The Univ. Tokyo, 2.d.lab, The Univ. Tokyo)

[16p-C302-7]Study on High-Field Transport and Statistical Variability of Nanosheet Oxide Semiconductor FETs for Device Scaling in Monolithic 3D Integration

Kaito Hikake1, 〇Xingyu Huang1, Sung-hun Kim1, Kota Sakai1, Zhuo Li1, Tomoko Mizutani1, Takuya Saraya1, Toshiro Hiramoto1, Takanori Takahashi2, Mutsunori Uenuma2, Yukiharu Uraoka2, Masaharu Kobayashi1,3 (1.IIS, Univ. of Tokyo, 2.NAIST, 3.d.lab, Univ. of Tokyo)

[16p-C302-8]Exploration of new intermetallic compounds for advanced interconnects using electron transport database obtained by DFT calculation

〇Masaya Iwabuchi1, Junichi Koike1 (1.Tohoku Univ.)

[16p-C302-9]Chemical Vapor Deposition of Cu on Ta using CuI-precursor

〇Yu Miyamoto1, Satoshi Yamauchi1 (1.Ibaraki Univ.)

[16p-C302-10]Electrical characteristics of thick-metal-film interconnects on silicon oxide films by directly bonding of Al foils

〇(M2)Saki Murotani1, Sakura Uehara2, Eiji Shikoh1, Jianbo Liang1, Naoteru Shigekawa1 (1.Osaka Metropolitan Univ., 2.Osaka City Univ.)

[16p-C302-11]Early non-destructive detection of electromigration studied by sub-THz ultrasound

〇Akira Nagakubo1, Shuhei Izuma1, Atsushi Nishimura2, Yoshiro Kabe2, Hirotsugu Ogi1 (1.The Univ. of Osaka, 2.Skyworks Filter Solutions Japan Co., Ltd.)

[16p-C302-12]Optimization of PCM/Selector stacked memory structure for decreasing reset current and improving endurance characteristics

〇Matsuzawa Yuya1, Katono Kazuhiro1, Tsukagoshi Takayuki1, Fujii Shosuke1, Fujimaki Takeshi1 (1.Kioxia)

[16p-C302-13]Power-gating architecture and performance of nonvolatile SRAM

Taketo Kato1, 〇Haruya Oki1, Yusaku Shiotsu1, Shuu'ichirou Yamamoto1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)

[16p-C302-14]Comparative study of gain cells for pseudo-SRAM

〇Sei Yoshida1, Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)

[16p-C302-15]A processing-in-memory SRAM cell with XNOR function for energy minimum-point operation

〇Kein Kondo1, Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)

[16p-C302-16]Design of an INT4-inference neural-network accelerator macro for energy minimum point operation

〇Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)

[16p-C302-17]Design and performance of a 10T-SRAM cell using isolated read ports for low voltage operation

〇Tadakatsu Yaguchi1, Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)

[16p-C302-18]Design of a ULVR-SRAM cell for highly stable energy minimum-point operation

〇Katsutoshi Ito1, Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Tokyo Inst. of Tech.)