[9a-S203-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies | The 86th JSAP Autumn Meeting 2025

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Oral presentation13 Semiconductors : 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[9a-S203-1~10]13.5 Semiconductor devices/ Interconnect/ Integration technologies

Tue. Sep 9, 2025 9:00 AM - 11:45 AM JST
Tue. Sep 9, 2025 12:00 AM - 2:45 AM UTC

S203 (Lecture Hall South)

9:00 AM - 9:15 AM JST(12:00 AM - 12:15 AM UTC)

[9a-S203-1][The 58th Young Scientist Presentation Award Speech] Improvement of crystal quality by selective H₂-introduced molecular beam epitaxy and room temperature operation of GeSn/GeSiSn resonant tunneling diode

〇Shota Torimoto¹, Shuto Ishimoto¹, Yoshiki Kato¹, Mitsuo Sakashita¹, Masashi Kurosawa¹, Osamu Nakatsuka^1,2, Shigehisa Shibayama¹ (1.Grad. Sch. of Eng., Nagoya Univ., 2.IMaSS, Nagoya Univ.)

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[9a-S203-2]Understanding the interfacial reaction of Bi₂Te₃/n-Ge and the effects on contact properties

〇(M1C)Mitsutaka Itoo¹, Mihyeon Kim¹, Shogo Hatayama², Wen Hsin Chang², Yuta Saito^1,2,3 (1.Tohoku Univ., 2.SFRC, AIST, 3.GXT, Tohoku Univ.)

9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[9a-S203-3]Nanosheet Oxide Semiconductor FETs with Amorphous and Polycrystalline InGaOx

〇(DC)Kota Sakai¹, Sunbin Hwang², Anlan Chen¹, Ki-woong Park¹, Xingyu Huang¹, Takuya Saraya¹, Toshiro Hiramoto¹, Takanori Takahashi³, Mutsunori Uenuma², Yukiharu Uraoka³, Masaharu Kobayashi¹ (1.IIS, The Univ. Tokyo, 2.AIST, 3.NAIST)

9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)

[9a-S203-4]Gate-All-Around Nanosheet Oxide Semiconductor FETs with Selectively Crystallized InGaOx

〇(DC)Kota Sakai¹, Anlan Chen¹, Ki-woong Park¹, Xingyu Huang¹, Takuya Saraya¹, Toshiro Hiramoto¹, Sunbin Hwang², Takanori Takahashi³, Mutsunori Uenuma², Yukiharu Uraoka³, Masaharu Kobayashi¹ (1.IIS, The Univ. Tokyo, 2.AIST, 3.NAIST)

10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[9a-S203-5]Spectroscopic ellipsometry characterization of SiP film for nano-sheet FET process

〇Naoto Kumagai¹, Toshifumi Irisawa¹, Yoshihiro Hayashi¹ (1.SFRC, AIST)

10:30 AM - 10:45 AM JST(1:30 AM - 1:45 AM UTC)

[9a-S203-6]Formation of Work Function Metals for Advanced Gate-all-around CMOS FET

〇Kenzo Manabe¹, Misako Morota¹, Hiroyuki Ota¹, Yukinori Morita¹, Toshifumi Irisawa¹, Yoshihiro Hayashi¹ (1.SFRC, AIS)

10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)

[9a-S203-7]Device Design of Nanosheet GAAFETs using Response Surface Method

〇Koichi Fukuda¹, Mariko Ninomiya¹, Junichi Hattori¹, Yoshihiro Hayashi¹ (1.AIST)

11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)

[9a-S203-8]Process Flow Optimization for GAAFET Using Profile Simulator

〇Yoko Tanaka¹, Kenzo Manabe¹, Atsushi Yagishita¹, Masanaga Fukasawa¹, Toshifumi Irisawa¹, Yoshihiro Hayashi¹ (1.AIST SFRC)

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[9a-S203-9]Demonstration of Integrate-and-Fire Operation using “GCCI SOI-Tr” with Gate Input Method

〇Haruki Yonezaki^1,2, Takayuki Mori¹, Jiro Ida¹ (1.Kanazawa Inst. of Tech., 2.KIOXIA Corp.)

11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)

[9a-S203-10]Structural Effects on Program Characteristics in 3D Flash Memories with Gate Side Injection Operation

〇Tatsuya Ishikawa¹, Hiroshi Takeda¹, Takashi Kurusu¹ (1.KIOXIA Corporation)

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