Session Details
[15p-S4_203-1~16]13.4 Si processing /Si based thin film / MEMS / Equipment technology
Sun. Mar 15, 2026 2:00 PM - 6:15 PM JST
Sun. Mar 15, 2026 5:00 AM - 9:15 AM UTC
Sun. Mar 15, 2026 5:00 AM - 9:15 AM UTC
S4_203 (South Bldg. 4)
[15p-S4_203-1][The 3rd Kenji Natori Award Speech] Growth of (001) Single-Crystal Strips in Sputtered Si by μCLS for Device Application
〇Ryota Nosu1 (1.Shimane Univ.)
[15p-S4_203-2]Fabrication and Evaluation of ptype FDSOI-MOSFETs
having subthreshold swing of 63.9±0.39mV/dec
〇(B)Kiichi Imayama1, Ryota Nosu1, Wenchang Yeh1 (1.Shimane Univ.)
[15p-S4_203-3]FDSOI-MOSFETs with SS of 60.5±0.1mV/dec and on/off ratio over 11 digits
〇WENCHANG YEH1, Ryota Nosu1 (1.Shimane Univ.)
[15p-S4_203-4]High-Performance SOQ MOSFETs Fabricated on (001) μCLS-Si Single-Crystal Strips
〇(M2)Ryota Nosu1, Wenchang Yeh1 (1.Shimane Univ.)
[15p-S4_203-5]Threshold voltage control of FDSOI-MOSFET by gate metal
〇WENCHANG YEH1, Ryota Nosu1 (1.Shimane Univ.)
[15p-S4_203-6]Comparison of Microwave and Laser Heating in Ion Implanted Silicon Substrates
〇Satoshi Fujii1, Hanae Yoshida1, Kazushige Sato2,4, Akira Uedono3 (1.N.I.T, Okinawa Col., 2.Sakaguchi Ele. Heat., 3.Tsukuba Univ., 4.Minimal)
[15p-S4_203-7]B doping into Si using ion implantation and KrF excimer laser annealing
〇(M1)Takumi Narazaki1, Ktatayama Keita1,2, Liu Yifan1, Hisato Yabuta1,2 (1.ISEE, Kyushu Univ., 2.GigaphotonNextGLP, Kyushu Univ.)
[15p-S4_203-8]Enhancing electron mobility of InZnOx channel thin-film-transistors by FLA
〇Yuma Ueno1, Li-Chi Peng2, Tsung-Te Chou3, Edward Yi Chang2, Chun-Hsiung Lin2, Kenji Inoue1, Katsuhiro Mitsuda1, Shinichi Kato1 (1.SCREEN SPE, 2.NYCU, 3.NCIR)
[15p-S4_203-9]Fabrication and Electrical Characterization of pn-Junction Tunnel Diodes Using ECR Plasma CVD without Substrate Heating
〇Seima Sato1,2, Tetsuya Ueno1,2, Masao Sakuraba1,2, Shigeo Sato1,2 (1.Tohoku Univ., 2.RIEC)
[15p-S4_203-10]Effect of Substrate Impurity Concentration on Interstitial Si and complex defect generated by Trench Processing
〇Koki Tomita1, Ito Yuta1, Fujimori Ryota1, Masuda Taiki1, Ogura Atsushi1,2, Ishimura Satoshi3, Kuboi Nobuyuki3, Saga Koichiro3 (1.Meiji Univ., 2.MREL, 3.Sony Semiconductor Solutions Corporation)
[15p-S4_203-11]Clarification of the coating mechanism aimed at improving the uniformity of resist coating width in the wafer edge protection process
〇Yuto Shioya1, Takayoshi Honda1, Yoshiya Hagimoto1 (1.Sony Semiconductor Solutions Corp.)
[15p-S4_203-12]Impact of Si surface nanostructure on water boiling behavior
〇(B)Jun Onoe1, Kantaro Kobayashi1, Rikuto Enoki1, Hiroaki Kakiuchi1, Hiromasa Ohmi1 (1.UOsaka)
[15p-S4_203-13]Real-time multi-point measurement of silicon wafer surface temperature using Optical Interference Contactless Thermometry (OICT)
〇Harumu Ono1, Jiawen Yu1, Hiroaki Hanafusa1, Seiichiro Higashi1 (1.Hiroshima Univ.)
[15p-S4_203-14]Ultra-Low-Temperature Formation of Thermal-Oxide-Grade SiO2 via Interface-Driven Self-Organization on Room-Temperature Sputtered SiO2
〇Kohei Sakaike1, Seiichiro Higashi2 (1.NIT, Hiroshima college, 2.Hiroshima Univ.)
[15p-S4_203-15]RTA Crystallization of InSb Films on Polyimide Deposited by RF Sputtering Using Ne
〇Tatsushi Higa1, Shuhei Shimizu1, Takashi Noguchi1, Takashi Kajiwara2, Taizoh Sadoh2, Tetsuo Okuyama3, Toshiyuki Tsuchiya3, Shinichi Taniguchi4, Shokichi Yoshitome4, Tatsuya Okada1 (1.Univ. Ryukyus, 2.KyuShu Univ., 3.Toyobo Co., LTD, 4.e-tec Co., LTD)
[15p-S4_203-16]Metal work-function and Fermi-level pinning on semiconductors (II)
〇Akira Toriumi1, Tomonori Nishimura2 (1.None, 2.Univ. Tokyo)
