[16p-S2_203-1~15] 13.5 Semiconductor devices/ Interconnect/ Integration technologies | The 73rd JSAP Spring Meeting 2026

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Oral presentation13 Semiconductors : 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[16p-S2_203-1~15]13.5 Semiconductor devices/ Interconnect/ Integration technologies

Mon. Mar 16, 2026 2:00 PM - 6:45 PM JST
Mon. Mar 16, 2026 5:00 AM - 9:45 AM UTC

S2_203 (South Bldg. 2)

2:00 PM - 2:45 PM JST(5:00 AM - 5:45 AM UTC)

[16p-S2_203-1][The 26th Outstanding Achievement Award Speech] The understanding of carrier transport properties in MOS transistors and the advancement of high-performance device technologies

〇Shinichi Takagi¹ (1.Teikyo Univ., ACRO)

2:45 PM - 3:15 PM JST(5:45 AM - 6:15 AM UTC)

[16p-S2_203-2][The 47th Paper Award Speech] SiO₂/Si interface defect characterization in advanced MOS fabrication

〇Shota Nunomura¹, Hiroyuki Ota¹, Toshifumi Irisawa¹, Kazuhiko Endo¹, Yukinori Morita¹ (1.AIST)

3:15 PM - 3:30 PM JST(6:15 AM - 6:30 AM UTC)

[16p-S2_203-3][The 59th Young Scientist Presentation Award Speech] Cryogenic conductance calculation of highly doped Si for advanced CMOS applications

〇Keito Yoshinaga¹, Ryo Toyoshima¹, Munehiro Tada², Ken Uchida¹ (1.Univ. Tokyo, 2.Keio Univ.)

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)

[16p-S2_203-4]Temperature dependence of surface-roughness-limited mobility in (100) Si n-MOSFETs

〇Shinichi Takagi¹, Kei Sumita², Xueyang Han², Zhao Jin², Yutong Chen², Mitsuru Takenaka², Kasidit Toprasertpong² (1.Teikyo Univ., ACRO, 2.The Univ. Tokyo)

3:45 PM - 4:00 PM JST(6:45 AM - 7:00 AM UTC)

[16p-S2_203-5]Gate Length Dependence of Subthreshold Swing in Cryogenic MOSFETs

〇(M1)Takumi Katori^1,2, Hidehiro Asai¹, Hiroshi Oka¹, Kimihiko Kato¹, Takumi Inaba¹, Yuika Kobayashi¹, Satoshi Moriyama², Takahiro Mori¹ (1.AIST, 2.Tokyo Denki Univ.)

4:00 PM - 4:15 PM JST(7:00 AM - 7:15 AM UTC)

[16p-S2_203-6]Heat Dissipation Effects via Contacts and Heatsinks in Cryogenic SOI MOSFET

〇Kosuke Hatta¹, Takayuki Mori¹, Shota Kondo¹, Hiroshi Oka², Takahiro Mori², Jiro Ida¹ (1.Kanazawa Inst. of Tech., 2.AIST)

4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[16p-S2_203-7]Reverse Short Channel Effect of MOSFETs at Cryogenic Temperatures

〇ZIJIA FENG¹, Tomoko Mizutani¹, Takuya Saraya¹, Masaharu Kobayashi¹, Toshiro Hiramoto¹ (1.The Univ. of Tokyo)

4:45 PM - 5:00 PM JST(7:45 AM - 8:00 AM UTC)

[16p-S2_203-8]A Study on the Origin of Drain Current RTN Under Strong Inversion at Cryogenic Temperatures

〇KIYOSHI TAKEUCHI¹, TOMOKO MIZUTANI¹, TAKUYA SARAYA¹, HIROSHI OKA², TAKAHIRO MORI², SHINICHI TAKAGI³, MASAHARU KOBAYASHI¹, TOSHIRO HIRAMOTO¹ (1.Univ. Tokyo, 2.AIST, 3.Teikyo Univ.)

5:00 PM - 5:15 PM JST(8:00 AM - 8:15 AM UTC)

[16p-S2_203-9]Analysis of Subthreshold Current Variability in Bulk and FDSOI MOSFETs at Cryogenic Temperatures

〇Tomoko Mizutani¹, Kiyoshi Takeuchi¹, Takuya Saraya¹, Inaba Takumi², Oka Hiroshi², Asai Hidehiro², Mori Takahiro², Kobayashi Masaharu¹, Hiramoto Toshiro¹ (1.Univ. of Tokyo,, 2.AIST)

5:15 PM - 5:30 PM JST(8:15 AM - 8:30 AM UTC)

[16p-S2_203-10]Gate-Bias-Dependence of Drain Current RTN at Room and Cryogenic Temperatures

〇KIYOSHI TAKEUCHI¹, TOMOKO MIZUTANI¹, TAKUYA SARAYA¹, HIROSHI OKA², TAKAHIRO MORI², MASAHARU KOBAYASHI¹, TOSHIRO HIRAMOTO¹ (1.Univ. Tokyo, 2.AIST)

5:30 PM - 5:45 PM JST(8:30 AM - 8:45 AM UTC)

[16p-S2_203-11]Mechanism of valley splitting at a semiconductor/insulator interface

〇Toshiaki Hayashi¹, Hiroyuki Kageshima², Yasushi Shinohara¹, Jinichiro Noborisaka¹, Katsuhiko Nishiguchi¹ (1.NTT, 2.Shimane Univ.)

5:45 PM - 6:00 PM JST(8:45 AM - 9:00 AM UTC)

[16p-S2_203-12]Direct observation of electron capture processes in amphoteric defect states achieved by charge pumping in individual defects at MOS interface (18) -Derivation method of σ-

〇Toshiaki Tsuchiya¹, Masahiro Hori¹, Yukinori Ono¹ (1.Shizuoka Univ.)

6:00 PM - 6:15 PM JST(9:00 AM - 9:15 AM UTC)

[16p-S2_203-13]Optical control of carrier polarity in MOSFET fabricated with undoped Si substrate(Ⅰ)

〇(DC)Jin Miura¹, Jiei Mukoyama¹, Tetsuhiro Owa¹, Kenji Ikushima¹ (1.Tokyo Univ. of A & T)

6:15 PM - 6:30 PM JST(9:15 AM - 9:30 AM UTC)

[16p-S2_203-14]Optical control of carrier polarity in MOSFET fabricated with undoped Si substrate (Ⅱ)

〇(B)Jiei Mukoyama¹, Jin Miura¹, Tetsuhiro Owa¹, Kenji Ikushima¹ (1.Tokyo Univ. of A & T)

6:30 PM - 6:45 PM JST(9:30 AM - 9:45 AM UTC)

[16p-S2_203-15]Indexing current-voltage characteristics using a hash function

〇Tetsufumi Tanamoto¹, Tomoko Mizutani², Keiji Ono³, Toshiro Hiramoto² (1.Teikyo Univ., 2.Tokyo Univ., 3.Riken)

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