[PL-1]WebTop Collaboration and Semiconductor Industry
S. Kohyama(1.Toshiba)
2001 International Conference on Solid State Devices and Materials
Sep 26 - Sep 28, 2001Diamond Hotel, Tokyo, Japan
You can search for presentations in this event.
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2001 International Conference on Solid State Devices and Materials
Sep 26 - Sep 28, 2001Diamond Hotel, Tokyo, Japan
You can search for presentations in this event.
SearchSearch Results(338)
[PL-2]Prospects of Si ULSI Devices for the Next Ten Years
Yuan Taur(1.IBM T. J. Watson Research Center)
[PL-3]Nanotechnology Strategy and Grand Challenges in U.S
M. C. Roco(1.U. S. National Science and Technology Council's subcommittee on Nanoscale Science, Engineering and Technology (NSET), 2.Nanotechnology, National Science Foundation)
[A-1-1]Recent Progress in High-k Dielectric Films for ULSIs
Sang In Lee(1.Semiconductor R&D Division, Samsung Electronics Co., Ltd.)
[A-1-2]Periodic Mesoporous Silicate Glass as Low-k Thin Film
Yoshiaki Oku, Akira Kamisawa, Norikazu Nishiyama, Korekazu Ueyama(1.Process Technology Div., Semiconductor Research and Development Headquarters, ROHM CO., Ltd., 2.Osaka University, Graduate School of Engineering Science)
[A-1-3]Global Planarization with Viscosity Control for an Advanced STP Process
N. Sato, K. Machida, M. Yano, K. Kudou, H. Kyuragi(1.NTT Telecommunications Energy Laboratories, NTT Advanced Technology Corporation)
[A-1-4]Dishing-Free Cu Chemical Mechanical Polishing Process Based on Endpoint Detection with Laser Beam
Y. Tokuyama, H. Ogawa, M. Yanagisawa, J. Kikuchi, H. Nakagawa, Y. Horiike(1.Department of Materials Science, School of Engineering, The University of Tokyo, 2.Speedfam Co., Ltd., 3.Axiomatec Inc., 4.Semiconductor Company, Matsushita Electric Industrial Co., Ltd)
[A-1-5]CMP Using Fixed Abrasive Tool (FX-CMP) for Dielectric Planarization
S. Katagiri, K. Yasui, Y. Kawamura, U. Yamaguchi, M. Nagasawa, F. Kanai, R. Kawai, M. Tokuda, S. Moriyama, N. Yamada(1.Central Research Laboratory, Hitachi, Ltd., 2.Semiconductor & Integrated circuits, Hitachi, Ltd., 3.Manufacturing Engineering & Environmental Policy Department, Hitachi, Ltd., 4.Instruments, Hitachi, Ltd., 5.Institute of Technologists, 6.Nihon Tokushu Kento co., Ltd.)
[A-1-6]A Study on Reclaimed Photoresist Developer Using an Electrodialysis Method
Hiroshi Sugawara, Yoshinori Tajima, Tadahiro Ohmi(1.Department of Electronic Engineering, Graduate School of Engineering, Tohoku University, 2.Organo Corporation, 3.New Industry Creation Hatchery Center, Tohoku University)
[A-2-1]Ruthenium Film Etching and Cleaning Process Using Cerium Ammonium Nitrate (CAN)-Nitric Acid
H. Aoki, K. Watanabe, T. Iizuka, N. Ishikawa, K. Mori(1.ULSI Device Development Division, NEC Corporation, 2.Central Research Laboratory, KANTO CHEMICAL CO., INC.)
[A-2-2]Spin-Drying with CO2 Gas Purge for 0.13 μm DRAM's Contact Process
Yoshihiro Ogawa, Hisashi Okuchi, Hiroshi Tomita, Kunihiro Miyazaki, Kazuhiko Takase, Soichi Nadahara(1.Process and Manufacturing Engineering center., Toshiba Corp. Semiconductor company)
[A-2-3]The Effect of Organic Contaminations Molecular Weights in the Cleanroom Air on MOS Devices Degradation--a Controlled Laminar Air Flow Experiment
Takeshi Ohkawa, Yoshihide Wakayama, Sadao Kobayashi, Shigetoshi Sugawa, Herzl Aharoni, Tadahiro Ohmi(1.Department of Electronic Engineering, Tohoku University, 2.New Industry Creation Hatchery Center, Tohoku University, 3.Taisei Corporation, 4.Department of Electrical and Computer Engineering Ben-Gurion University of the Negev Beer-Sheva)
[A-2-4]Impact of Gate Etch Damage and Profile in High Density DRAM Cell
Il-Gweon Kim, Jung-wan Bae, Jun-Ho Choy, Nam-Sung Kim, Young-Woo Kweon, Se-Kyoung Choi, Sung-Chul Kim, Joo-Seog Park, Ji-Byum Kim(1.TG4-P9, Memory R&D Division, Hynix Semiconductor Inc.)
[A-2-5]Effect of Poly Metal Gate Etch Post-Cleaning on the Tail Distribution of DRAM Data Retention Time
Nam-Sung Kim, Il-Gweon Kim, Jun-Ho Choy, Se-Kyeong Choi, Jo-Bong Choi, Young-Woo Kweon, Sung-Cheul Kim, Ju-Seok Park, Ji-Bum Kim(1.Technology Group 4, Memory R&D Division, Hynix Semiconductor Co., Ltd.)
[A-2-6]A Thermally Robust Ti-Rich TiNx Contact Metallization Realizing an Interconnect System Suitable to 0.10-μm DRAMs and Beyond
Isamu Asano, Yoshitaka Nakamura, Hideo Aoki, Naoki Fukuda, Satoru Yamada, Toshihiro Sekiguchi(1.ELPIDA MEMORY, Inc., 2.Device Development Center, Hitachi Ltd., 3.Semiconductor Group, Hitachi Ltd.)
[A-2-7]240-nm Pitch Aluminum Interconnects Formation by UHF-ECR Plasma Etching Incorporating TM Bias and Novel-Gas Chemistry
Naoyuki Kofuji, Takashi Tsutsumi, Eiji Matsumoto, Kotaro Fujimoto, Naoshi Itabashi, Masaru Izawa, Takashi Fujii, Shin'ichi Tachi(1.Central Research Laboratory, Hitachi, Ltd., 2.Kasado Semiconductor Equipment Product Division, Hitachi, Ltd., 3.Hitachi Techno Eng. Co., Ltd.)
[A-2-8]Filling of Tungsten into Deep Trench Using Time-Modulation CVD Method
Y. Igarashi, T. Morooka, Y. Yamada, T. Nakamura, K. W. Lee, K. T. Park, H. Kurino, M. Koyanagi(1.Dept. of Machine Intelligence and Systems Engineering, Tohoku Univ., 2.JST(Japan Science and Technology Corporation))
[B-1-1]Issues of Current LSI Technology and an Expectation for New System-Level Integration
Takayasu Sakurai(1.Center for Collaborative Research, and Institute of Industrial Science, University of Tokyo)
[B-1-2]Three-Dimensional Integration of Fully Depleted SOI Devices
T. Morooka, T. Nakamura, Y. Yamada, Y. Igarashi, K. W. Lee, K. T. Park, H. Kurino, M. Koyanagi(1.Dept. of Machine Intelligence and Systems Engineering, Tohoku University, 2.JST(Japan Science and Technology Corporation))
[B-1-3]Electroplating Cu Filling Study for Thorough Electrode in Silicon Wafer of Three Dimensional LSI Chip Stacking
M. Tomisaka, H. Yonemura, M. Hoshino, K. Takahashi(1.Electronic System Integration Technology Research Department, Association of Super-Advanced Electronic Technologies (ASET))
[B-1-4]Feasibility of Direct Bonding Between CMP-Cu Films at Room Temperature for Bumpless Interconnect
Akitsu Shigetou, Naoe Hosoda, Toshihiro Itoh, Tadatomo Suga(1.Research Center for Advanced Science and Technology, The University of Tokyo)
[B-1-5]New Plasma Surface Treatment for Wire Bonding Process -Effect of Sublimation with Alkyl Group Radicals-
Kazuhiro Honsho, Hirokazu Terai, Hiroshi Yamazoe, Toshiaki Tatsuta, Osamu Tsuji(1.Samco International Inc.)
[B-1-6]Oxygen Plasma Activated Silicon Direct Bonding in PECVD Mode
T. H. Kim, M. M. R. Howlader, T. Itoh, T. Suga(1.Research Center for Advanced Science and Technology (RCAST), The University of Tokyo)
[B-1-7]Influence on Electrical Characteristic of Direct Au-Bumping on MOSFET
Naoya Watanabe, Tanemasa Asano(1.Center for Microelectronic Systems, Kyushu Institute of Technology)
[B-2-1]Recent Advances in SOP Integration
Venky Sundaram, Sidharth Dalmia, Joseph Hobbs, Swapan Bhattacharya, Madhavan Swaminathan, George White, Rao Tummala(1.School of Electrical & Computer Engineering, Packaging Research Center, Georgia Institute of Technology)
[B-2-2]Interconnect Length Distribution in Si System ULSI
Naohiro Takagi, Hiyouko Shinoki, Tomohito Tsushima, Yoshisato Yokoyama, Kazuya Masu(1.Precision and Intelligence Laboratory, Tokyo Institute of Technology)
[B-2-3]Effects of On-Chip Capacitor on Switching Noise and Radiated Emission
Toshio Sudo, Ken Nakano, Junichi Kudo, Satoru Haga(1.Association of Super-advanced Electronics Technologies (ASET) Tsukuba Center)
[B-2-4]GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI
Yoshisato Yokoyama, Tomohito Tsushima, Hiyouko Shinoki, Naohiro Takagi, Kazuya Masu(1.Precision and Intelligence Laboratory, Tokyo Institute of Technology)
[LB-1-1]Micro Bump Interconnection Technologies in 20 μm Pitch on 3D System in Package
Tadahiro Morifuji, Yoshihiro Tomita, Ryoichi Kajiwara, Kenji Takahashi(1.Association of Super-Advanced Electronics Technologies (ASET) Electronic System Integration Technology Research Department, Tsukuba Research Center Room C-B-5, Tsukuba Center Inc.)
[C-1-1]RF Power Performance of AlGaN/GaN HJFETs
N. Hayama, Y. Okamoto, K. Kasahara, T. Nakayama, Y. Ohno, H. Miyamoto, Y. Ando, M. Kazuhara, NEC, Japan(1.Photonic and Wireless Devices Research Laboratories, NEC Corporation, 2.The University of Tokushima)
[C-1-2]Studies of AlGaN/GaN High Electron Mobility Transistors on Semi-Insulating Silicon Carbide and Sapphire Substrates
S. Arulkumaran, T. Egawa, H. Ishikawa, T. Jimbo(1.Research Centre for Micro-Structure Devices, Nagoya Institute of Technology)
[C-1-3]Elmination of Kink Phenomena in InP-Based HEMTs by Forming Direct Ohmic Contacts in the Channel
Ken Sawada, Tomoyuki Arai, Tsuyoshi Takahashi, Naoki Hara(1.Fujitsu Laboratories Ltd.)
[C-1-4]Investigation of Low-Frequency Noise Behavior of In0.52Al0.48As/In0.60Ga0.40As Metamorphic High Electron Mobility Transistors
Jeong Hoon Kim, Hyung-Sup Yoon, Jin-Hee Lee, Kyung Ho Lee, Jong-In Song(1.Dept. of Information and Communications, K-JIST, 2.Microwave Devices Team, ETRI)
[C-1-5]Theoretical and Experimental Study on Thermal Characteristics of InP/InGaAs Single Heterojunction Bipolar Transistors
Taeho Kim, Yongjoo Song, Hyun-Min Park, Moonjung Kim, Songcheol Hong, Kyounghoon Yang(1.Dept. of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology(KAIST))
[C-1-6]A Trial of Dual Emitter HBT for MMIC Power Amplifier Application
Y. S. Lee, C. S. Park(1.School of Engineering, Information and Communications University)
[C-2-1]Evolution and Current Status of RF Semiconductor Devices
Juin J. Liou, Frank Schwierz(1.School of Electrical Engineering and Computer Science, University of Central Florida, 2.Fachgebiet Festkorperelektronik, Technische Universitat Ilmenau)
[C-2-2]A Low Distortion pHEMT with Newly Developed Composite Channel Structure
Yasunori Tateno, Masaki Nagahara, Jun-ichiro Nikaido, Tsutomu Igarashi, Heidarpour A. Ebrahim, Yasuhiro Nakasha, Kazukiyo Joshin(1.Fujitsu Quantum Devices Limited, 2.Fujitsu Laboratories Limited)
[C-2-3]A 2W High Efficiency 4-12 GHz GaAs HFET MMIC Power Amplifier
Hidenori Yukawa, Masatoshi Nii, Yoshihiro Tsukahara, Yasushi Itoh, Yukio Ikeda(1.Mitsubishi Electric Corporation, Information Technology R&D Center, 2.Mitsubishi Electric Corporation, Communication Systems Center, 3.Mitsubishi Electric Corporation, High Frequency & Optical Semiconductor Div.)
[C-2-4]AlGaAs/GaAs PHEMT MMIC Broadband Power Amplifier from 17GHz to 36GHz for K/Ka-Band Applications
Y. C. Lee, C. S. Park(1.School of Engineering, Information and Communications University)
[C-2-5]Ku-Band Multi-Stage MMIC Low-Noise Amplifier Loaded with Doubl Gain-Equalizing Circuits
Koji Yamanaka, Kazunori Sugaya, Tetsuro Yamaguchi, Naoki Tanahashi, Yasushi Itoh, Tadashi Takagi(1.Mitsubishi Electric Corporation, Information Technology R&D Center)
[C-2-6]A Ultra Broadband SPST GaAs PIN Diode Switch with 30 dB Isolation and 1.0 dB Insertion Loss
Hideki Takasu, Fumio Sasaki, Juichi Ozaki(1.Microwave Solid-State Engineering Department, Komukai Operations, Toshiba Corporation)
[C-2-7]RF Integrated Spiral Inductor with Double-Sided Ferromagnetic Layers
Masahiro Yamaguchi, Makoto Baba, Ken-Ichi Arai(1.Research Institute of Electrical Communication, Tohoku University)
[D-1-1]Bio-Inspired VLSIs Based on Analog/Digital Merged Technologies
Atsushi IWATA, Takashi MORIE, Makoto NAGATA(1.Graduate School of Advanced Science of Matter, Hiroshima University)
[D-1-2]A 1-D CMOS PWM Cellular Neural Network Circuit and Resistive-Fuse Network Operation
Takashi Morie, Makoto Miyake, Makoto Nagata, Atsushi Iwata(1.Graduate School of Advanced Sciences of Matter, Hiroshima University)
[D-1-3]Optimizing Associative Processor Architecture for Intelligent Internet Search Applications
Huaiyu Xu, Yoshio Mita, Tadashi Shibata(1.Department of Electronic engineering, The University of Tokyo, 2.Department of Frontier Informatics, The University of Tokyo)
[D-1-4]A High-Performance Time-Domain Winner-Take-All Circuit Employing OR-Tree Architecture
Kiyoto Ito, Makoto Ogawa, Tadashi Shibata(1.Department of Frontier Informatics, School of Frontier Science, The University of Tokyo)
[D-1-5]Physical Random-Number Generator Using Schottky MOSFET
Tanemasa ASANO, Yasuhiro MAEDA, Gou NAKAGAWA, Yutaka ARIMA(1.Center for Microelectronic Systems, Kyushu Institute of Technology)
[D-2-1]Low Power Technologies for High Performance Systems
Tadahiro Kuroda(1.Electrical Engineering, Keio University)
[D-2-2]Low-Power Data-Preserving Complementary Pass-Transistor-Based Circuit for Power-Down Circuit Scheme
Ki-Tae Park, Tomokatsu Mizukusa, Hyo-Sig Won, Kyu-Myung Choi, Jeong-Taek Kong, Hiroyuki Kurino, Mitsumasa Koyanagi(1.Dept. of Machine Intelligence and Systems Engineering, Tohoku University, 2.Samsung Electronics Co., LTD)
[D-2-3]An Independent-Source Overdriven Sense Amplifier for Multi-Gigabit DRAM Array
Riichiro Takemura, Tomonori Sekiguchi, Hiroki Fujisawa, Tsugio Takahashi, Takeshi Sakata, Masayuki Nakamura(1.Central Research Laboratory, Hitachi Ltd., 2.Elpida Memory, Inc.)
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