Session Details
[Tu-P]Poster Session
Tue. Sep 29, 2026 4:00 PM - 6:00 PM JST
Tue. Sep 29, 2026 7:00 AM - 9:00 AM UTC
Tue. Sep 29, 2026 7:00 AM - 9:00 AM UTC
Poster-B (4th Floor, G401+G402)
[Tu-P-37]Predicting Electronic Stopping Powers along 4H-SiC <11-23> Direction
*Kazuhiro Mochizuki1, Tomoaki Nishimura1, Tomoyoshi Mishima1, Fumimasa Horikiri1, Hiroshi Ohta1,2 (1. Hosei Univ. (Japan), 2. Devise Tech Inc. (Japan))
[Tu-P-38]Damage Accumulation During High-energy Channeling Implantation of Phosphorus into 4H-SiC
*Manuel Belanche Guadas1, Helton Goncalves de Medeiros1, René Heller2, Hitesh Jayaprakash3, Ulrike Grossner1 (1. APS - ETH Zurich (Switzerland), 2. Helmholtz-Zentrum Dresden-Rossendorf (Germany), 3. mi2-factory GmbH (Germany))
[Tu-P-39]Process Simulations of Channeling Implantation for Silicon Carbide Superjunction Power Devices
*Enrico Sangregorio1, Francesco La Via1 (1. National Research Council of Italy - Institute for Microelectronics and Microsystems (Italy))
[Tu-P-40]Effect of Intermediate Annealing on Channeling Implantation in 4H-SiC
*Takeyoshi Masuda1,2, Yu Saito1, Heiji Watanabe2 (1. MITSUMI ELECTRIC Corp. (Japan), 2. Osaka Univ. (Japan))
[Tu-P-41]Multilayer Metallization Strategies for Low-Resistivity Ohmic Contacts to n and p-type 4H-SiC
*Alisha Arora1, Adrian Holm Dubré1, Haiyan Ou1 (1. Technical Univ. of Denmark (Denmark))
[Tu-P-42]n-Type 4H-SiC contact engineering by implantation-annealing co-optimization
Pierre-Edouard Raynal1, sami bolat1, Giovanni Alfieri1, Pooria Asadollahi1, *Fulvio Mazzamuto2, Mike Ameen2, Dwight Roh2 (1. Hitachi Energy (Switzerland), 2. Axcelis (USA))
[Tu-P-43]Comparison of Laser-Annealed Ni and Ti Silicide Ohmic Contacts and Device Performance in 4H-SiC SBDs
Gyunseo Kim1,2, Marko Seifert3, Volker Franke3, Sungwook Jang4, Naksun Sung4, Beomsang Kim4, Tae-Yong Park1, Seong-Min Jeong1, Youngjae Park5, Minjae Kang5, Seongjun Kim5, *Yun-Ji Shin1 (1. KICET (Korea), 2. Kumoh National Inst. of Tech. (Korea), 3. Fraunhofer IWS (Germany), 4. AP systems Corp. (Korea), 5. NINT (Korea))
[Tu-P-44]Comparison of Nanosecond and Femtosecond UV Laser Annealing for Ohmic Contact Formation of Ni/4H-SiC
Yi-Chen Hung1, Ping-Yu Lin1, *Chiao-Yang Cheng1, Di-Hua Huang2, Yi-Chi Lee3 (1. Academy of Innovative Semiconductor and Sustainable Manufac., National Cheng Kung Univ., Tainan 701 (Taiwan), 2. JUMBO LASER Co., Ltd., Tainan 744 (Taiwan), 3. Indus. Tech. and Res. Inst., Hsinchu 310 (Taiwan))
[Tu-P-45]High-Stability Low-on-resistance 4H-SiC Power Devices by Warpage Control and Roughness-Engineered Backside Contacts
*Songlin Yang1 (1. Zhuzhou CRRC Times Semiconductor Co Ltd, (China))
[Tu-P-46]Doping- and Annealing-Dependent Evolution of Transport Mechanisms in Ti/n-4H-SiC Contacts from Rectifying to Ohmic Behavior
*NaLing Zhang1, QinZe Cao1, Huan Ge1, Zheyang Li1, Rui Jin1, Tao Zhu1 (1. Beijing Huairou Lab. (China))
[Tu-P-47]High-Temperature Stability of Silicide-Free Mo/SiCA Ohmic Contacts and SBDs on 4H-SiC
*Hiroaki Hanafusa1, Takahito Fukuzawa1, Seiichiro Higashi1 (1. Hiroshima Univ. (Japan))
[Tu-P-48]WN Diffusion Barrier for Low Gate Leakage Current GaN HEMT Device
*Paolo Badalà1, Antonino Parisi1, Santo Reina1, Cristina Tringali1, Anna Bassi1, Brunella Cafra1, Ferdinando Iucolano1 (1. STMicroelectronics (Italy))
[Tu-P-49]Impact of Substrate Dislocations on the Leakage Characteristics of 650V SiC Power MOSFETs
*Fabiana Vento1, Giovanni Maira1, Andrea Russo1, Nicolo Piluso1, Enzo Fontana1, Cristiano Calabretta1, Nicoletta Spampinato1, Alice Lombardo1, Damiana Spagnuolo1, Giuseppe Arena1, Andrea Severino1 (1. Indus. STMicroelectronics (Italy))
[Tu-P-50]Impact of micro-pits defects on the low temperature electrical characteristics of 650 V 4H-SiC power MOSFETs
*Marco Zignale1, Patrick Fiorenza1, Salvatore Ethan Panasci1, Alberto Catena2, Francesco Maria Fiorino2, Filippo Giannazzo1, Fabrizio Roccaforte1 (1. CNR-IMM (Italy), 2. STMicroelectronics (Italy))
[Tu-P-51]Reduction of On-Resistance and Improvement in Process Margins in Highly-Scaled Trench MOSFETs
*Rajni K Sah1, Dallas T Morisette1, James A Cooper1 (1. Purdue University (USA))
[Tu-P-52]Impact of Double-Epitaxial Drift Layer on JFET-Width-Dependent Characteristics in 1.2-kV 4H-SiC MOSFETs
*Junki Jung1, Sumin Park1, Seungri Yang1, Hyun Park2, Sangik Cheon2, Yehwan Kang2, Jaejin Song3, Derek D. Lee3 (1. Pusan National University (Korea), 2. SK Powertech (Korea), 3. SK Keyfoundry (Korea))
[Tu-P-53]Non-Monotonic Reverse Recovery Behavior in 1.2 kV SBD-Embedded SiC MOSFETs with Different SBD-P-well Ratios
*Wonyoung Shin1, Gyuhyeok Kang1, Jeongtae Kim1, Jinwoo Park1, Juhui Kim1, Sihyun Kwon1, Hyojoon Seo2, Soontak Kwon2, Ogyun Seok1 (1. Pusan National University (Korea), 2. TRinno Technology Co., Ltd (Korea))
[Tu-P-54]Design optimization for switching performance characteristics in 1.2kV SiC trench MOSFET
*Juyun Ha1, Kwangwon Lee1, Taeseop Lee1, Seunghyun Hong1, Bongyong Lee1 (1. onsemi (Korea))
[Tu-P-55]Short-Circuit and Surge-Current Robustness Limit of SiC MOSFETs at Negative and Elevated Temperatures
*Mohamed Alaluss1, Madhu Lakshman Mysore1, Maximilian Goller1, Josef Lutz1, Thomas Basler1 (1. Chemnitz Univ. of Tech. (Germany))
[Tu-P-56]Investigation of Drain-Induced Threshold Voltage Shifts in 1200V SiC MOSFETs
*Woongsun Kim1, Naeem Islam1, Shane Stein1, Sei-Hyung Ryu1, Adam Barkley1, Elif Balkas1 (1. Wolfspeed Inc. (USA))
[Tu-P-57]Enhanced High-Temperature Body Diode Stability and Low Switching Losses in 1.2 kV 4H-SiC Planar MOSFETs via Optimized Current Spreading Layer (CSL)
*Yeongeun Park1, Sangik Cheon2, Kyungeun Park2, In-Hwan Ji1, Derek D Lee1 (1. SK Keyfoundry (Korea), 2. SK Powetech (Korea))
[Tu-P-58]Cell Pitch Optimization for Ron,sp < 2 mΩ-cm2 for 1200V Planar SiC MOSFETs
*Aditi Agarwal1, Rahul Potera1, Bohee Kang1, David Sheridan1 (1. Alpha and Omega Semiconductors (USA))
[Tu-P-59]Investigation of the Short-Circuit Failure Mechanisms in 1700 V 4H-SiC VDMOSFETs
*Yu-Jen Chen1, Shih-Chiang Shen1, Chih-Ming Tzeng1, Chih-Ming Lai1 (1. Indus. Tech. Res. Inst. (Taiwan))
[Tu-P-60]Comprehensive Experimental Analysis on SmartSiCTM On-state Benefits for 1700V Power Components from Room to High temperature
*Francesco Serra di Santa Maria1, Cyrille Le Royer1, Jérôme Biscarrat1, Romain Lavieville1, Walter Gonçalez Filho1, Walter Schwarzenbach2, Frédéric Allibert2, Philippe Godignon1 (1. CEA-Leti (France), 2. Soitec (France))
[Tu-P-61]Design Study of Asymmetric Pillar for Robustness Enhancement in 4H-SiC Semi-Superjunction Geometry
*Yuzuki Hayakawa1, Daisuke Iizasa1, Seigo Mori1, Yuki Nakano1 (1. ROHM Co., Ltd. (Japan))
[Tu-P-62]Interface Engineered ALD SiO2 / SiC MOS oxide stack using PEALD-enabled controlled nitridation - Part I: MOSCAP analysis
*Andrii Voznyi1, Tatiana Ivanova1, Mikko Söderlund1, Patrick Rabinzohn1, Tamara Fidler2, Patrick Schmid2, Alexander Schmid3, Franziska Beyer3 (1. Beneq Oy (Finland), 2. Centrotherm International AG (Germany), 3. Fraunhofer IISB (Germany))
[Tu-P-63]Enhanced electrical characteristics of 4H-SiC MOSFETs with atomic layer deposited SiO2 gate dielectrics via ultrathin interfacial passivation
*Bongmook Lee1, Veena Misra2 (1. SUNY Polytechnic Institute (USA), 2. North Carolina State Univesity (USA))
[Tu-P-64]Process Optimization of SiO2/AlON Gate Stack for Reliable 4H-SiC MOS-Channel Devices
*Pengwei Zhou1, Heng Wang1, Yangming Du1, Yingchen Yang1, Kevin Jing CHEN1 (1. The Hong Kong University of Science and Technology (Hong Kong))
[Tu-P-65]Impact of Atomic Layer Etching Surface Pretreatment on ALD
SiO2/4H-SiC MOS Interface and Channel Transport Properties
*Mustafa Akif YILDIRIM1, Vishal Ajit Shah1, Sean Cho2, Katarzyna Stokeley2, Harriet van der Vliet2, Sami Bolat3, Peter M Gammon1, Marina Antoniou1, Arne Benjamin Renz1 (1. Univ. of Warwick (UK), 2. Oxford Instruments Plasma Tech. (UK), 3. Hitachi Energy Semiconductors Switzerland Ltd (Switzerland))
[Tu-P-66]Impact of nitrogen-based pre-ALD treatments and post-deposition
annealing on SiO2/4H-SiC and Al2O3/4H-SiC MOS capacitors
Emanuela Schilirò1, Raffaella Lo Nigro1, Marco Zignale1, Patrick Fiorenza1, Giuseppe Greco1, Valerio Votadoro1, Salvatore Di Franco1, Filippo Giannazzo1, Arpita Saha2, Yi Shu2, *Fabrizio Roccaforte1 (1. CNR-IMM, Catania (Italy), 2. Oxford Instruments Plasma Technology, Bristol (UK))
[Tu-P-67]Enhancing Performance of 4H-SiC CMOS Integrated Circuits via Atomic Layer Deposition Gate oxide
*Po-Han Wang1, I-Chen Tsai1, Cheng-Shu Chang1, Yun-Ting Huang1, Nai-Quan Sun1, Bing-Yue Tsui1 (1. National Yang Ming Chiao Tung University (Taiwan))
[Tu-P-68]Effects of Wet and Nitric Oxide Post-Deposition Annealing on the Interface Quality and Long-term Reliability of LPCVD SiO2 on 4H-SiC
*I-Chen Tsai1, Bing-Yue Tsui1, Shih-Lung Tsai2, Kuan-Wei Chu2, Tien-Min Yuan2 (1. National Yang Ming Chiao Tung Univ. (Taiwan), 2. Mosel Vitelic Inc. (Taiwan))
[Tu-P-69]Reducing Cover Wafer Effect in Dry Oxidation of 4H-SiC in Thermal Oxidation Furnace
*Tamara Fidler1, Silvan Schick1, Patrick Schmid1 (1. centrotherm international AG (Germany))