[P-1]The Relationship between Stanford and Silicon Valley: a Dean's Perspective
James F. Gibbons(1.Dean, School of Engineering, 1984-1996 Stanford University)
2000 International Conference on Solid State Devices and Materials
Aug 29 - Aug 31, 2000Sendai International Center, Sendai, Japan
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2000 International Conference on Solid State Devices and Materials
Aug 29 - Aug 31, 2000Sendai International Center, Sendai, Japan
You can search for presentations in this event.
SearchSearch Results(274)
[P-2]SOP and SOC: the Best of Both
Rao R. Tummala(1.Pctit Chair Professor Director, NSF-ERC Packaging Research Center Georgia Eminent Scholar Georgia Institute of Technology)
[P-3]Required Device Technologies for Future Photonic Networks
Masao KAWACHI(1.NTT Network Innovation Laboratories)
[P-4]The Role Microfabrication in the Coming "Century of Biology"
D. Jed Harrison(1.Dept. of Chemistry, University of Alberta)
[A-1-1]Integrated Circuit Challenges, from Transistors to Packages
Mark Bohr(1.Portland Technology Development, Intel Corporation)
[A-1-2]New Mechanisms and the Characterization of Plasma Charging Enhanced Hot Carrier Effect in Deep-Submicron N-MOSFET's
S. J. Chen, H. L. Kao, Steve S. Chung, C. C. Chen, C. Y. Chang, H. C. Lin(1.Department of Electronic Engineering, National Chiao Tung University, 2.National Nano Device Lab.)
[A-1-3]Indium Profile Control for Super Steep Retrograde (SSR) Well
T. Matsuda, A. Mineji, N. Nishio, H. Kitajima(1.ULSI Device Development Division, NEC Electron Devices, NEC Corporation)
[A-1-4]A Study on Mechanism of Chemical Mechanical Polishing on Al and Cu Surfaces Employing In-situ Infrared Spectroscopy
Hiroki Ogawa, Yusuke Tokuyama, Michihiko Yanagisawa, Jun Kikuchi, Yasuhiro Horiike(1.Department of Materials Science, School of Engineering, University of Tokyo, 2.Speedfam-IPEC Co., Ltd., 3.Axiomatec Inc.)
[A-1-5]Characterization of Tungsten Carbide as Diffusion Barrier for Cu Metallization
Shui Jinn Wang, Hao Yi Tsai, S. C. Sun(1.Microelectronics Lab., Dept. of Electrical Engineering, National Cheng Kung University, 2.R&D, Wafertech)
[A-1-6]Aluminum Chemical Vapor Deposition Technology for High Deposition Rate and Surface Morphology Improvement
Chang-Hun Lee, Takamasa Nishimura, Kazuya Masu, Kazuo Tsubouchi(1.Research Institute of Electrical Communication, Tohoku University)
[A-1-7]Novel Nozzle-Scan Coating Method for Low-k Films
R. Nakata, N. Yamada, A. Kajita, S. Ito, K. Okumura, T. Kitano, M. Morikawa, K. Takeshita, Y. Esaki, M. Akimoto(1.PROCESS & MANUFACTURING ENGINEERING CENTER, TOSHIBA CORPORATION, 2.SYSTEM LSI DEVELOPMENT CENTER, TOSHIBA CORPORATION, 3.R&D Dept., Tokyo Electron Kyushu Ltd.)
[A-2-1]Reliability and Electromigration Failure Modes in Dual Inlaid Cu Interconnects
C. Capasso, M. Herrick, M. Gall, D. Jawarani, S. Thrasher, L. Zhao, H. Kawasaki(1.Advanced Products Research and Development Laboratory DigitalDNA TM Laboratories, Motorola, 2.Technology Development Group, Advanced Micro Devices)
[A-2-2]Copper Electrodeposition: Principles and Recent Progress
Jonathan Reid(1.Novellus Systems, Portland Technology Center)
[A-2-3]Ultra-Thin Silicon Oxynitride Films as Cu Diffusion Barrier for Lowering Interconnect Resistivity
Tetsuhiro Nanbu, Katsuyuki Sekine, Yuji Saito, Shin-ichi Nakao, Masaki Hirayama, Tadahiro Ohmi(1.Department of Electronic Engineering, Graduate School of Engineering, Tohoku University, 2.New Industry Creation Hatchery Center, Tohoku University)
[A-2-4]Copper Ion Drift Rates in Porous Methylsilsesquiazane Dielectric Films
S. Mukaigawa, T. Oda, T. Aoki, Y. Shimizu, T. Kikkawa(1.Research Center for Nanodevices and Systems, Hiroshima University, 2.Tonen Corporation)
[A-2-5]Dielectric Breakdown and Light Emission in Copper Damascene Structure under Bias-Temperature Stress
Ken-ichi Takeda, Kenji Hinode, Junji Noguchi, Hizuru Yamaguchi(1.Central Research Laboratory, Hitachi LTD., 2.Device Development Center, Hitachi LTD.)
[A-2-6]Evaluation of PECVD a-SiC:H as a Cu Diffusion Barrier Layer of Cu Dual Damascene Process
Soo Gun Lee, Hyeok-Sang Oh, Hong-Jae Shin, Jin-Gi Hong, Hyeon-Deok Lee, Hokyu Kang(1.Process Development Team, Semiconductor R&D center, Samsung Electronics)
[B-1-1]Deuterium Effect on Both Interface-State Generation and Stress-Induced-Leakage-Current under Fowler-Nordheim Electron Injection
Yuichiro Mitani, Hideki Satake, Hitoshi Ito, Akira Toriumi(1.Advanced LSI Technology Laboratory, Toshiba Corp.)
[B-1-2]Quantitative Understanding of Electron Mobility Limited by Coulomb Scattering in MOSFETs with N2O and NO Oxynitrides
Takamitsu Ishihara, Shin-ichi Takagi, Masaki Kondo(1.Advanced LSI Thechnology Laboratory, Research and Development center, Toshiba corporation, 2.Semiconductor company, System LSI Division, Toshiba corporation)
[B-1-3]The Impact for Gate Oxide Scaling (32A-12A) and Power Supply for Sub-0.1 μm CMOSFETs
W. K. Yeh, C. Y. Lin, S. M. Cheng, C. T. Huang, H. H. Shih, J. K. Chen, F. T. Liou(1.United Microelectronics Corp., Logic Technology Department, Technology & Process Development Division)
[B-1-4]Surface Channel Metal Gate CMOS with Light Counter Doping and Single Work Function Gate Electrode
K. T. Nishinohara, Y. Akasaka, T. Saito, A. Yagishita, A. Murakoshi, K. Suguro, T. Arikado(1.Process and Manufacturing Engineering Center, Semiconductor Company, Toshiba Corp.)
[B-1-5]High Density 0.16 μm Embedded-DRAM-ASIC Process Technology for a SoC Platform
J. Ida, H. Tanaka, K. Fukuda, M. Takeda, H. Shinohara, N. Nakayama, E. Seo, K. Yoshida, H. Higashino, Y. Miyakawa, M. Kageyama, Y. Harada, M. Matsumoto, T. Inoue, F. Yokoyama(1.LSI Production Division, VLSI R&D Center, LSI Division, OKI Electric Industry Co., Ltd.)
[B-1-6]70nm NMOSFET Fabrication with 12nm n+-p Junctions Using As2+A Low Energy Ion Implantations
Byung Yong Choi, Suk Kang Sung, Byung Gook Park, Jong Duk Lee(1.Inter-university Semiconductor Research Center, School of Electrical Engineering, Seoul National University)
[B-1-7]Self-Aligned Pocket Implantation into Elevated Source/Drain MOSFETs for Reduction of Junction Capacitance and Leakage Current
Naruhisa Miura, Yuji Abe, Kohei Sugihara, Toshiyuki Oishi, Taisuke Furukawa, Takumi Nakahata, Katsuomi Shiozawa, Shigemitsu Maruno, Yasunori Tokuda(1.Advanced Technology R&D Center, Mitsubishi Electric Corporation)
[B-1-8]A Novel T-Shaped Shallow Trench Isolation Technology Using Sidewall Spacer for 512Mbit Flash Memories and Beyond
S. H. Hong, D. H. Ahn, M. H. Park, T. K. Kim, H. K. Kang, J. T. Moon(1.Semiconductor R&D Center, Samsung Electronics Co., LTD)
[B-2-1]20nm MOS Devices for the Birth of the 21st Century
Simon Deleonibus, Guillaume Bertrand, Georges Guegan, Michel Heitzmann, Pierre Mur, David Souil, Serge Tedesco(1.LETI (CEA-GRENOBLE) Departement de Microelectronique)
[B-2-2]A Study of the VTH Fluctuation for 25nm CMOS
Kiyoshi Takeuchi, Risho Koh, Tohru Mogami(1.Silicon Systems Research Labs., NEC)
[B-2-3]Comparison of Sub-Bandgap Impact Ionization in Deep-Sub-Micron Conventional and Lateral Asymmetrical Channel nMOSFETs
Anil K. G., S. Mahapatra, V. Ramgopal Rao, I. Eisele(1.Institute of Physics, Universitat der Bundeswehr Munich, 2.Department of Electrical Engineering, Indian Institute of Technology)
[B-2-4]Impact of Strained-Si Channel on CMOS Circuit Performance under the Sub-100nm Regime
Tetsuo Hatakeyama, Kazuya Matsuzawa, Shin-ichi Takagi(1.Advanced LSI Technology Laboratory, Corporate Research & Development Center, Toshiba Corporation)
[B-2-5]Improved Low Temperature Characteristics of Raised Source and Drain (RSD) Si1-x Gex PMOSFET's
H. J. Huang, K. M. Chen, T. Y. Huang, G. W. Huang, C. Y. Chang(1.Department of Electronics Engineering and Institute of Electronics, National Chiao-Tung University, 2.National Nano Device Laboratories)
[B-2-6]Measurement of Hole Transport Parameters in Ultra-Thin SiGe Layers and Their Application in 2D Device Simulations of Heterojunction pMOSFETs
R. J. P. Lander, Y. V. Ponomarev, W. B. de Boer, R. Loo, M. Caymax(1.Philips Research Laboratories, 2.IMEC)
[B-2-7]Bandgap and Strain Engineering in SiGeC Heterojunction Bipolar Transistors
K. Yuki, K. Toyoda, T. Takagi, Y. Kanzawa, K. Nozawa, T. Saitoh, M. Kubo(1.Advanced Technology Research Lab., Matsushita Electric Industrial Co., Ltd.)
[C-1-1]Ultrafast Demultiplexing and Bit-Wise Logic Operation Using Symmetric Mach-Zehnder All-Optical Switches
K. Tajima, S. Nakamura, Y. Ueno(1.System Devices and Fundamental Research, NEC Corporation)
[C-1-2]500 GHz Optical Pulse Generation from a Short-Cavity GRIN-SCH-MQW Mode-Locked Laser Diode
Shin Arahira, Yukio Katoh, Yoh Ogawa(1.Components Division, Oki Electric Industry Co., Ltd.)
[C-1-3]Optical BPSK Subcarrier Modulation Using an Integrated Hybrid Device
M. Shin, J. Lim, J. Kim, J. S. Kim, K. E. Pyun, S. Hong(1.Department of Electrical Engineering, KAIST, 2.Telecommunication Basic Research Lab., ETRI)
[C-1-4]Variable Wavelength Shifter Using Four-Wave Mixing in a Wavelength Selectable Laser
T. Simoyama, H. Kuwatsuka, M. Bouda, M. Matsuda, Y. Kotaki, H. Ishikawa(1.Fujitsu Laboratories Ltd.)
[C-1-5]Demonstration of All-Optical Wavelength Converter Based on Fabry-Perot Semiconductor Optical Amplifier
Masumi Saitoh, Mitsuru Takenaka, Byongjin Ma, Yoshiaki Nakano(1.Department of Electronic Engineering, The University of Tokyo)
[C-1-6]Polarization-Dependent Optical Gain and Gain Saturation in Vertical-Cavity Surface-Emitting Lasers
Yutaka Takahashi, Hitoshi Kawaguchi(1.Department of Electrical and Information Engineering, Yamagata University)
[C-1-7]All-Optical 2-D Serial-to-Parallel Pulse Converter Using an Organic Film with Femtosecond Optical Response
Satoshi Tatsuura, Osamu Wada, Makoto Furuki, Minquan Tian, Yasuhiro Sato, Lyong Sun Pu(1.FESTA Laboratories, The Femtosecond Technology Research Association, 2.Corporate Research Center, Fuji Xerox Co., Ltd.)
[C-2-1]High-Speed Uni-Traveling-Carrier Photodiodes for Fiber-Optic Communications
Hiroshi Ito, Tadao Ishibashi(1.NTT Photonics Laboratories)
[C-2-2]Velocity Mismatching Effect of Traveling Wave Electroabsorption Modulator
J. Lim, M. Shin, J. Kim, J. S. Kim, K. E. Pyun, S. Hong(1.Department of Electrical Engineering, KAIST, 2.Telecommunication Basic Research Lab. ETRI)
[C-2-3]A Novel High Responsivity, Wide Band Silicon Photodiode
Toe Naing Swe, Kiat Seng Yeo(1.School of Electrical and Electronic Engineering, Nanyang Technological University)
[C-2-4]A New High Radiance LED Structure with Circular 45° Corner Reflector
Eun-Hyun Park, Jung-Ho Cha, Young-Se Kwon(1.Department of Electrical Engineering, Korea Advanced Institute of Science and Technology)
[C-2-5]High-Brightness Wafer-Bonded ITO/AlGaInP/Mirror/Si Light Emitting Diodes
R. H. Horng, Y. C. Lien, W. C. Peng, D. S. Wuu(1.Institute of Precision Engineering, National Chung Hsing University, 2.Department of Electrical Engineering, Da-Yeh University)
[C-2-6]1.55 μm Spot-Size Converter Integrated Laser Diodes Fabricated by Selective Area MOVPE Growth with Various Mask Patterns
Hyun-Soo Kim, Dae Kon Oh, Moon-Ho Park, Nam Hwang, In-Hoon Choi(1.Department of Materials Science and Engineering, Korea University, 2.Electronics and Telecommunications Research Institute)
[C-2-7]Front Mirror Absorption Characterization on High-Power GaAs Laser Diodes by Means of Thermoreflectance Technique
Schaub Emmanuel, Baba Tetsuya(1.National Research Laboratory of Metrology)
[D-1-1]Organic Transistors for Logic and Flexible Display Applications
A. Dodabalapur, B. Crone, J. A. Rogers, Z. Bao, R. W. Filas, Y.-Y. Lin, V. R. Raju, H. E. Katz(1.Lucent Technologies, Bell Laboratories)
[D-1-2]Ultra-Low Biased Field Emitter Using Single Wall Carbon Nanotube Directly Grown onto Silicon Tip by Thermal CVD
Kazuhiko Matsumoto, Seizo Kinosita, Yoshitaka Gotoh, Masami Ishii(1.Electrotechnical Laboratory, CREST)
[D-1-3]High Performance MOS Tunneling Cathode with CoSi2 Gate Electrode
T. Sadoh, Y. Zhang, H. Yasunaga, A. Kenjo, T. Tsurushima, M. Miyao(1.Department of Electronics, Kyushu University)
[D-1-4]Resonant Tunneling Cathodes Using GaAs/AlAs Quantum Structures
H. Mimura, K. Okamura, Y. Neo, H. Shimawaki, K. Yokoo(1.Research Institute of Electrical Communication, Tohoku University)
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