[A-0-1]The Status of Vacuum Microelectronics
Robert K. PARKER, Henry F. GRAY(1.Naval Research Laboratory)
1989 Conference on Solid State Devices and Materials
Aug 28 - Aug 30, 1989Nippon Toshi Center, Tokyo, Japan
You can search for presentations in this event.
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1989 Conference on Solid State Devices and Materials
Aug 28 - Aug 30, 1989Nippon Toshi Center, Tokyo, Japan
You can search for presentations in this event.
SearchSearch Results(144)
[A-0-2]Limited Reaction Processing: Growth of Si-Ge/Si for Heterojunction Bipolar Transistor Applications
Jim GIBBONS, Judy HOYT, Cliff KING, Dave NOBLE, Chris GRONET, Martin SCOTT, Steve LADERMAN, Jeff ROSNER, Kris NAUKA, John TURNER, Ted KAMINS(1.Stanford Electronics Labs, 2.Hewlett-Packard Co.)
[A-0-3]Recent Progress on OEICs
R. F. Leheny(1.Bell Communications Research, Inc.)
[A-1-1]Thermally Stable TiSi2 Thin Films by Modification in Interface and Surface Structures
A. Ohsaki, J. Komori, T. Katayama, M. Shimizu, T. Okamoto, H. Kotani, S. Nagao(1.LSI Research and Development Laboratory Mitsubishi Electric Corporation)
[A-1-2]Effect of W Film Stress on W-Gate MOS Characteristics
Hideaki MATSUHASHI, Satosi NISHIKAWA, Seigo OHNO(1.Semiconductor Technology Laboratory, OKI Electric Industry Co., Ltd.)
[A-1-3]Reduction of Internal Stress by Compositional Gradient Layer Inserted between TiSi2 and Si
Tomonobu HATA, Masanobu Tsuchitani, Kenji Kamiya, Susumu Horita(1.Faculty of Technology, Kanazawa University)
[A-1-4]Thermal Stability Studies on Copper Thin Films Formed by a Low-Kinetic-Energy Particle Process
Tatsuyiki Saito, Tadahiro Ohmi, Tadashi Shibata, Masahito Otsuki, Takahisa Nitta(1.Department of Electronics, Faculty of Engineering Tohoku University, 2.Device Development Center, Hitachi Ltd.)
[A-2-1]Epitaxial Growth of Al(100) on Si(100) by Gas-Temperature-Controlled Chemical Vapor Deposition
Atsushi SEKIGUCHI, Tsukasa KOBAYASHI, Naokichi HOSOKAWA, Tatsuo ASAMAKI(1.ANELVA Corporation)
[A-2-2]Electromigration Induced Abrupt Change of Electrical Resistance in Aluminum Interconnection
Shoso Shingubara, Hisashi Kaneko, Makoto Saitoh(1.Toshiba ULSI Research Center, Toshiba R&D Center, 2.Tokyo Institute of Technology)
[A-2-3]Selective Ge CVD as a Via Hole Filling Method and Self-Aligned Impurity Diffusion Microsource in Si Processing
Min-Lin CHENG, Armin KOHLHASE, Taketoshi SATO, Shin-ichi KOBAYASHI, Junichi MUROTA, Nobuo MIKOSHIBA(1.Research Institute of Electrical Communication, Tohoku University)
[A-2-4]Blanket CVD-W Formed by SiH4 Reduction of WF6 on TiN for Planar Interconnection
M. Iwasaki, H. Itoh, T. Katayama, K. Tsukamoto, Y. Akasaka(1.LSI R&D Lab., Mitsubishi Electric Corp.)
[A-3-1]Effect of Atomic-Order Substrate Surface Planarization and O2 Partial Pressure Control during Growth on Crystalline Quality of Si/SrxBa1-xO/Si(111) Structure
Yuichi Kado, Yoshinobu Arita(1.NTT LSI Laboratories)
[A-3-2]Digital CVD of SiO2
Masayuki NAKANO, Hideaki KAWAMOTO, Akiyoshi NAGATA, Masataka HIROSE, Yasuhiro HORIIKE(1.Department of Physical Electronics, Faculty of Engineering, Hiroshima University)
[A-3-3]Atomic Layer Growth of Silicon by Excimer Laser Induced Cryogenic CVD
T. TANAKA, T. FUKUDA, Y. NAGASAWA, S. MIYAZAKI, M. HIROSE(1.Department of Electrical Engineering, Hiroshima University)
[A-3-4]Mechanism of Si Laser Atomic Layer Epitaxy Using the Adsorption and Thermally-induced Reactions of Si2H6 on Si(100) 2x1
Y. Suda, D. Lubben, T. Motooka, J. E. Greene(1.R&D Center, Toshiba Corporation, 2.Coordinated Science Laboratory, University of Illinois)
[A-3-5]Abrupt and Defect-Free p+-n+ Junction Formed by Low-Temperature Photo-Epitaxy with Continuous Boron and Phosphorous Doping
Tatsuya Yamazaki, Hiroshi minakata, Takashi Ito(1.Fujitsu Laboratries Ltd.)
[A-4-1]Dry Oxidation Study on CVD-SiO2/Thermal-SiO2/Si Structure
Shigeki KURODA, Kenji NISHI, Jun UEDA(1.Oki Electric Industry Co., Ltd.)
[A-4-2]Highly Stable Fluorinated Plasma CVD Silicon Nitride Film by SiH4 Addition for ULSI Passivation
K. Shimokawa, M. Yoshimaru, H. Matsui(1.VLSI R&D Center, Oki Electric Industry Co., Ltd.)
[A-4-3]Silicon Nitride Films with Low Hydrogen Content, Low Stress, Low Damage and Stoichiometric Composition by Photo-Assisted Plasma CVD
Nobumasa SUZUKI, Toshiaki YOSHIKAWA, Kazuya MASU, Kazuo TSUBOUCHI, Nobuo MIKOSHIBA(1.Production Engineering Research Laboratory, Canon Inc., 2.Research Institute of Electrical Communication, Tohoku University)
[A-5-1]High Voltage MOSFETs Using Submicron LSI Process
Masatoshi Morikawa, Isao Yoshida, Hirotsugu Kojima, Yoshifumi Kawamoto(1.Central Research Laboratory, Hitachi Ltd.)
[A-5-2]A New Dielectric Isolation Technology Using Molten Silicon Spin Deposition
S. Itoh, S. Tanabe, T. Usui, K. Akahane, E. Fujya, Y. Tahara, Y. Maeda(1.Electronic Devices Group, Oki Electric Industry Co., Ltd., 2.Hoxan Research Laboratories, Hoxan Corporation)
[A-5-3]Fabrication of Si/CoSi2/Si Permeable Base Transistor Using Self-Aligned and Two Step Molecular Beam Epitaxy
N. Nakamura, T. Ohshima, K. Nakagawa, M. Miyao(1.Central Research Laboratory, Hitachi, Ltd.)
[A-5-4]Low Leakage SOIMOSFETs Fabricated Using a Wafer Bonding Method
M. Hashimoto, A. Ogasawara, M. Shimanoe, A. Nieda, H. Satoh, A. Yagi, T. Matsushita(1.Research & Development Div., Semiconductor Group Sony Corp)
[A-6-1]Effect of Trap-State on Field-Effect Mobility of MOSFET's Formed on Large Grain Poly-Si Films
Teruo KATOH, Norio HIRASHITA(1.Oki Electric Industry Co., Ltd, VLSI R&D Laboratory)
[A-6-2]An 8 nm-thick Polysilicon MOS Transistor and Its Thin Film Effects
T. Hashimoto, T. Kobayashi, T. Mine, T. Yamanaka, N. Hashimoto, A. Shimizu, T. Nishida, Y. Kawamoto(1.Central Research Laboratory, Hitachi Ltd., 2.Hitachi VLSI Engineering Corp.)
[A-6-3]Three Dimentional Effects on Submicrometer Diagonal MOSFETs
Kazuyoshi TORII, Toru KAGA, Eiji TAKEDA(1.Central Research Laboratory, Hitachi Ltd.)
[A-6-4]Multilayered Well Formation for Sub-0.5 μm CMOS Devices Utilizing High Energy Ion Implantation
Kiyonori OHYU, Hidekazu GOTHO, Tadashi SUZUKI, Nobuyoshi NATSUAKI(1.Central Research Laboratory, Hitachi, Ltd.)
[A-7-1]CMOS Compatible Lateral Bipolar Transistor for BiCMOS Technology
N. Akiyama, A. Tamba, Y. Wakui, Y. Kobayashi(1.Hitachi Research Laboratory, Hitachi Ltd.)
[A-7-2]Physical Model for Deep Submicron Device Simulation
Ken'ichiro SONODA, Yoshitsugu INOUE, Kenji TANIGUCHI, Chihiro HAMAGUCHI(1.Department of Electronics Engineering, Osaka University)
[A-7-3]Limit on Triode Region Drivability for a 0.1μm MOSFET, Predicted by Process/Device Simulation Including Parasitic Resistance
Itaru Kamohara, Shinichi Takagi, Tetsunori Wada, Kenji Natori(1.ULSI Research Center, Toshiba Corporation)
[A-7-4]Substrate Engineering for VTH-Scaling at Low Supply Voltage (1.5-3 V) in ULSIs
Ryuichi Izawa, Digh Hisamoto, Eiji Takeda(1.Central Research Laboratory, Hitachi Ltd.)
[A-7-5]High Drivability CMOSFETs with Asymmetrical Source-Drain (ASD) Structure for Low Supply Voltage ULSIs
A. Shimizu, T. Yamanaka, N. Hashimoto, T. Hashimoto, Y. Sakai, E. Takeda(1.Hitachi VLSI Engineering Corp., 2.Central Reseach Laboratory Hitachi Ltd., 3.Semiconductor Design & Development Center, Hitachi Ltd.)
[A-8-1]A New Insight into the PN-Junction Characteristics of ULSI -The Time Dependent Junction Breakdown (TDJB)-
Hideyuki MATSUOKA, Digh HISAMOTO, Ryuichi IZAWA, Eiji TAKEDA(1.Central Research Laboratory, Hitachi Ltd.)
[A-8-2]High Efficiency Hot Electron Injection for EEPROM Applications Using a Buried Injector
G. J. Hemink, R. C. M. Wijburg, R. Cuppens, J. Middelhoek(1.University of Twente, Faculty of Electrical Engineering, 2.Philips Reaearch Laboratories)
[A-8-3]Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMs
T. Mine, S. Iijima, J. Yugami, K. Ohga, T. Morimoto(1.Central Research Laboratory, Hitachi Ltd., 2.Hitachi VLSI Engineering Corp.)
[A-8-4]A New Stacked Capacitor Cell with Thin Box Structured Storage Node
S. Inoue, A. Nitayama, K. Hieda, F. Horiguchi(1.ULSI Research Center, TOSHIBA Corporation)
[A-8-5]Collected Charge Enhancement due to Alpha Particle in an n-extremely thin p-n+ Structure
H. Nambu, Y. Idei, K. Kanetani, K. Yamaguchi, N. Homma, K. Ohhata, Y. Sakurai(1.Central Research Laboratory, Hitachi Ltd., 2.Hitachi Device Engineering Ltd.)
[B-1-1]Perfect-Selectivity Directional Etching of Silicon Using Ultraclean ECR Plasma
Takashi MATSUURA, Hiroaki UETAKE, Junichi MUROTA, Kouichi FUKUDA, Tadahiro OHMI, Nobuo MIKOSHIBA, Tadashi KAWASHIMA, Yoshihiro YAMASHITA(1.Department of Electronics, Faculty of Engineering, Tohoku University, 2.Research Institute of Electrical Communication, Tohoku University, 3.Takatsuka Units, Seiko Instruments Inc.)
[B-1-2]Microwave Plasma Etching of Silicon Dioxide for Half-Micron ULSIs
Kazuo NOJIRI, Eri IGUCHI, Koichiro KAWAMURA, Kazuya KADOTA(1.Semiconductor Design & Development Center, Hitachi Ltd., 2.Hitachi Microcomputer Engineering, Ltd.)
[B-1-3]Effect of Temperature on Dry Etching of Copper Films in Chlorinated Gases
Kazuhide Ohno, Masaaki Sato, Yoshinobu Arita(1.NTT LSI Laboratories)
[B-2-1]Universal Model for Impurity Diffusion and Oxidation of Silicon
K. Taniguchi, Y. Shibata, C. Hamaguchi(1.Department of Electronics Engineering, Osaka University)
[B-2-2]A Composite lon-Implantation/Dopant Diffusion Simulation Involving Point Defect Kinetics and Its Application to Ultra Shallow Base Design
Takako K. OKADA, Koichi KATO(1.ULSI Research Center, Toshiba Corporation, 2.Research and Development Center, Toshiba Corporation)
[B-2-3]A Study of Nucleation and Grain Growth in Silicon Implanted a-Silicon Films
Shigeru Kambayashi, Shinji Onga, Ichiro Mizushima, Katsuhiko Higuchi, Hiroshi Kuwano(1.ULSI Research Center, Toshiba Corporation, 2.Faculty of Science and Technology, Keio University)
[B-2-4]Optimization of the Amorphous Layer Thickness and the Junction Depth on the Preamorphization Method for Shallow-Junction Formation
A. Tanaka, T. Yamaji, A. Uchiyama, T. Hayashi, T. Iwabuchi, S. Nishikawa(1.Semiconductor Tech. Lab., Oki Electric Industry Co., Ltd.)
[B-2-5]Reduction of Thickness Secondary Defects in MeV Ion Implanted Silicon by Intrinsic Gettering
N. Shimizu, B. Mizuno, S. Akiyama, K. Tsuji, T. Ohzone(1.Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.)
[B-2-6]Chemical State and Diffusion Behavior of As in Arsenosilicate Glass (AsSG)
Yoshitaka TSUNASHIMA, Takako OKADA, Hideichi KAWAGUCHI, Shinji ONGA, Kikuo YAMABE(1.ULSI Research Center, TOSHIBA Co.)
[B-2-7]Reduction of Threading Dislocations and Oxide Precipitates in SIMOX Material
Mamoru Tomozane, H. Ming Liaw(1.Semiconductor Research and Development Laboratory Motorola, Inc.)
[B-3-1]Micromachining and Its Application for Pressure Sensors
Susumu SUGIYAMA, Isemi IGARASHI(1.Toyota Central Res. & Develop. Labs., Inc.)
[B-3-2]Integrated Mass Flow Controller by Micromachining of Silicon
Masayosi ESASHI, Akira NAKANO, Shuichi SHOJI(1.Department of Electronic Engineering Tohoku University)
[B-4-1]Demands for Submicron MOSFET's and Nitrided Oxide Gate-Dielectrics
Takashi Hori(1.Basic Research Laboratory, Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.)
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